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i-manager's Journal on Electronics Engineering (JELE)

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An analytical approach to Network with IoT security using NodeMCU access point- Prevention Technique
AUDIO CRYPTOGRAPHY USING AES ALGORITHM TECHNIQUE
ULTRA WIDEBAND TECHNOLOGY
Smart Rover-Voice Control Bluetooth Control Robot to Avoid Obstacles
A Review of Quality Assurance Texture for Highly Pigmented Iris Recognition Using an Optimal Wavelength Band
FEATURE EXTRACTION AND CLASSIFICATION OF DIFFERENT HAND MOVEMENTS FROM THE EMG SIGNAL USING LINEAR DISCRIMINANT ANALYSIS CLASSIFIER

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Volume 13 Issue 2 January - March 2023

Research Paper

Development of a 4-Digit BCD Multiplier Architecture with Similarity Investigator

Marcus Lloyde George*

University of the West Indies, St Augustine, Trinidad and Tobago.

George, M. L. (2023). Development of a 4-Digit BCD Multiplier Architecture with Similarity Investigator. i-manager’s Journal on Electronics Engineering, 13(2), 1-17. https://doi.org/10.26634/jele.13.2.19476

Abstract

Arithmetic Logic Units (ALUs) are very important components in computer systems. They are digital circuits utilized to perform a wide variety of arithmetic and logic operations. Modern Central Processing Units (CPUs) contain powerful and complex ALUs. One such operation performed by ALUs is that of Multiplication. Multiplication scales one variable by another. This research involves the design, implementation and verification of a 4-digit BCD Multiplier Core with Similarity Investigator for path delay reduction. The system is implemented using Xilinx ISE 14.7, verified using ISim and Digilent Nexy3 toolkit and was utilized as the development platform. The research concluded that similarity investigation was capable of path delay reduction of up to 97% compared to that when no similarity investigation was applied. The system can conduct a maximum of 889 unique multiplication operations before facing diminishing returns as a result of the similarity investigation search procedure.

References

[1]. Ahmed, S. E., Varma, S., & Srinivas, M. B. (2018). Improved designs of digit-by-digit decimal multiplier. Integration, 61, 150-159.

[2]. Al-Khaleel, O. D., Tulić, N. H., & Mhaidat, K. M. (2012, April). FPGA implementation of binary coded decimal digit adders and multipliers. In 2012 8th International Symposium on Mechatronics and its Applications (pp. 1-5). IEEE.

[3]. Al-Khaleel, O., Al-Qudah, Z., Al-Khaleel, M., Papachristou, C. A., & Wolff, F. G. (2011, October). Fast and compact binary-to-BCD conversion circuits for decimal multiplication. In 2011 IEEE 29th International Conference on Computer Design (ICCD) (pp. 226-231). IEEE.

[4]. Anguraj, P., & Krishnan, T. (2021). Design and implementation of modified BCD digit multiplier for digitby- digit decimal multiplier. Analog Integrated Circuits and Signal Processing, 107, 683-694.

[5]. Aruna, T. A., & Bhanumathi, V. (2018, March). An optimised BCD digit multiplier. In 2018 International Conference on Current Trends towards Converging Technologies (ICCTCT) (pp. 1-4). IEEE.

[6]. Bayrakci, A. A., & Akkas, A. (2007, July). Reduced delay BCD adder. In 2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP) (pp. 266-271). IEEE.

[7]. Bhattacharya, J., Gupta, A., & Singh, A. (2010, April). A high performance binary to BCD converter for decimal multiplication. In Proceedings of 2010 International Symposium on VLSI Design, Automation and Test (pp. 315-318). IEEE.

[8]. Castillo, E., Lloris, A., Morales, D. P., Parrilla, L., García, A., & Botella, G. (2017). A new area-efficient BCD-digit multiplier. Digital Signal Processing, 62, 1-10.

[9]. Cowlishaw, M. F. (2003, June). Decimal floating-point: Algorism for computers. In Proceedings 2003 16th IEEE Symposium on Computer Arithmetic (pp. 104-111). IEEE.

[10]. Dadda, L., Pisoni, M., & Santambrogio, M. D. (2012, December). A parallel-serial decimal multiplier architecture. In 2012 IEEE 15th International Conference on Computational Science and Engineering (pp. 310-317). IEEE.

[11]. Guardia, C. E. M. (2012, March). Implementation of a fully pipelined BCD multiplier in FPGA. In 2012 VIII Southern Conference on Programmable Logic (pp. 1-6). IEEE.

[12]. Haque, M., Sworna, Z. T., Hasan Babu, H. M., & Biswas, A. K. (2018). A fast FPGA-based BCD adder. Circuits, Systems, and Signal Processing, 37, 4384-4408.

[13]. Jaberipur, G., & Kaivani, A. (2007). Binary-coded decimal digit multipliers. IET Computers & Digital Techniques, 1(4), 377-381.

[14]. Kumar, H. A., & Umadevi, S. (2015). Implementation of fast radix-10 BCD multiplier in FPGA. Indian Journal of Science and Technology, 8(19), 1-6.

[15]. Kumar, N., Bansal, M., & Kumar, N. (2012). VLSI architecture of pipelined booth Wallace MAC unit. International Journal of Computer Applications, 57(11), 14-18.

[16]. Lakshmi, G. S., Fatima, K., & Madhavi, B. K. (2016, November). Implementation of high speed Vedic BCD multiplier using vinculum method. In 2016 IEEE Region 10 Conference (TENCON) (pp. 147-151). IEEE.

[17]. Mehta, A. K., Gupta, M., Jain, V., & Kumar, S. (2013, December). High performance Vedic BCD multiplier and modified binary to BCD converter. In 2013 Annual IEEE India Conference (INDICON) (pp. 1-6). IEEE.

[18]. Neto, H. C., & Véstias, M. P. (2008, September). Decimal multiplier on FPGA using embedded binary multipliers. In 2008 International Conference on Field Programmable Logic and Applications (pp. 197-202). IEEE.

[19]. Pawlak, A., Bouchard, F., & Bakowski, P. (1997, April). Survey on VHDL Modelling Guidelines. In Proceedings of the 2nd Workshop on Libraries, Component Modeling, and Quality Assurance, Toledo, Spain (pp. 117-128).

[20]. Perry, D. L. (1998). VHDL. McGraw-Hill, New York.

[21]. Sreelakshmi, G., Fatima, K., & Madhavi, B. K. (2019, July). Design and implementation of vinculum binary coded decimal multipliers using vinculum binary coded decimal compressors. In 2019 International Conference on Communication and Electronics Systems (ICCES) (pp. 2085-2090). IEEE.

[22]. Sutter, G., Todorovich, E., Bioul, G., Vazquez, M., & Deschamps, J. P. (2009, December). FPGA implementations of BCD multipliers. In 2009 International Conference on Reconfigurable Computing and FPGAs (pp. 36-41). IEEE.

[23]. Sworna, Z. T., Haque, M. U., & Anisuzzaman, D. M. (2018, December). High-Speed and area-efficient LUTBased BCD multiplier design. In 2018 IEEE International WIE Conference on Electrical and Computer Engineering (WIECON-ECE) (pp. 1-4). IEEE.

[24]. Tsang, A., & Olschanowsky, M. (1991). A study of database 2 customer queries. IBM Santa Teresa Laboratory, San Jose, CA.

[25]. Vazquez, A., & De Dinechin, F. (2010a, December). Efficient implementation of parallel BCD multiplication in LUT-6 FPGAs. In 2010 International Conference on Field- Programmable Technology (pp. 126-133). IEEE.

[26]. Vazquez, A., & de Dinechin, F. (2010b). Multioperand decimal tree adders for FPGAs. Institut National de Recherche en Informatique et en Automatique (pp. 1-20).

[27]. Veeramachaneni, S., & Srinivas, M. B. (2008, October). Novel high-speed architecture for 32-bit binary coded decimal (bcd) multiplier. In 2008 International Symposium on Communications and Information Technologies (pp. 543-546). IEEE.

[28]. Véstias, M. P., & Neto, H. C. (2010, March). Parallel decimal multipliers using binary multipliers. In 2010 VI Southern Programmable Logic Conference (SPL) (pp. 73-78). IEEE.

[29]. Véstias, M. P., & Neto, H. C. (2011, April). Iterative decimal multiplication using binary arithmetic. In 2011 VII Southern Conference on Programmable Logic (SPL) (pp. 257-262). IEEE.

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Research Paper

A Compact Plus Shaped with L-Shaped Slotted Microstrip Patch Antenna for GSM, WLAN, WiMAX, C- and X- Band Applications

Parimal Tiwari* , K. K. Verma**

*-** Department of Physics and Electronics, Dr. Rammanohar Lohia Avadh University, Ayodhya, Uttar Pradesh, India.

Tiwari, P., and Verma, K. K. (2023). A Compact Plus Shaped with L-Shaped Slotted Microstrip Patch Antenna for GSM, WLAN, WiMAX, C- and X- Band Applications. i-manager’s Journal on Electronics Engineering, 13(2), 18-27. https://doi.org/10.26634/jele.13.2.19385

Abstract

In this research article, a compact plus-shaped L-shaped slotted microstrip patch antenna is proposed for various applications, including the Global System for Mobile communication (GSM), Wireless Local Area Network (WLAN), Worldwide Interoperability for Microwave Access (WiMAX), and C-band X-band applications. The rectangular patch includes a plus-shaped slot, with an L-shaped slot cut along it, providing enhanced bandwidth and gain with multiband resonance. The radiation pattern of the proposed antenna is also better. The proposed antenna is capable of operating in four bands: (2.0 – 2.5 GHz)/2.2 GHz for GSM and WLAN applications, (3.6 – 3.9 GHz)/3.7 GHz for Wireless Fidelity (WiFi) and WiMAX applications, (6.7 -7.4 GHz)/7.1 GHz, and (9.1 – 10.8 GHz)/10 GHz for C- and X-band applications. The impedance bandwidth is 22.7%, 8.1%, 10%, and 17% for each respective frequency range. A parametric analysis of different dimensions, Voltage Standing Wave Ratio (VSWR), surface current distribution, and radiation pattern is presented to verify and validate the design parameters in each sections.

References

[1]. Garg, R., Bhartia, P., & Bahl, I. (2001). Microstrip Antenna Design Handbook. Artech House, Boston.

[2]. He, M., Ye, X., Zhou, P., Zhao, G., Zhang, C., & Sun, H. (2014). A small-size dual-feed broadband circularly polarized U-slot patch antenna. IEEE Antennas and Wireless Propagation Letters, 14, 898-901.

[3]. Jagadeesha, S., Vani, R. M., & Hunagund, P. V. (2012). Slotted plus shape microstrip antenna with enhanced bandwidth. International Journal of Scientific & Engineering Research, 3(4), 1-4.

[4]. Kaur, J., & Khanna, R. (2014). Development of dual band microstrip patch antenna for WLAN/MIMO/WIMAX/AMSAT/WAVE applications. Microwave and Optical Technology Letters, 56(4), 988-993.

[5]. Kushwaha, D., Rathore, V. S., & Pathak, R. S. (2013). Improved bandwidth of a plus shape micro strip patch antenna. International Journal of Engineering Research & Technology, 2(8), 1196-1199.

[6]. Pan, Y., Ma, Y., Xiong, J., Hou, Z., & Zeng, Y. (2015). A compact antenna with frequency and pattern reconfigurable characteristics. Microwave and Optical Technology Letters, 57(11), 2467-2471.

[7]. Patel, R. H., Desai, A. H., & Upadhyaya, T. (2015). Design of H-shape X-band application electrically small antenna. International Journal of Electrical Electronics and Data Communication (IJEEDC), 3(12), 1-4.

[8]. Raithatha, U., Kashyap, S. S., & Shivakrishna, D. (2015). Swastika shaped microstrip patch antenna for ISM band applications. International Research Journal of Engineering and Technology (IRJET), 2(2), 516-519.

[9]. Ritika, & Bisht, R. S. (2018). Review paper for plus shaped slotted microstrip patch antenna for wireless bands. International Journal for Science and Advance Research in Technology, 4(7), 9-13.

[10]. Sahoo, S., & Mohanty, M. N. (2016). Design of Zshape microstrip antenna with I-slot for wi-max/satellite application. Journal of Communication and Computer, 13, 261-265.

[11]. Sarkar, D., Saurav, K., & Srivastava, K. V. (2014). Multi band microstrip fed slot antenna loaded with split ring resonator. Electronics Letters, 50(21), 1498-1500.

[12]. Sikandar, & Kamakshi. (2018). Analysis of plus shape slot loaded circular microstrip antenna. Recent Trends in Communication, Computing, and Electronics (pp. 69-75).

[13]. Srivastva, A., Chandra, S., Kumar, A., Kumar, P., & Sekhar, J. (2017, May). Design of plus-slot microstrip patch antenna for bluetooth and wi-max applications. In 2017 2nd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT) (pp. 2154-2156). IEEE.

[14]. Sun, J. S., Fang, H. S., Lin, P. Y., & Chuang, C. S. (2015). Triple-band MIMO antenna for mobile wireless applications. IEEE Antennas and Wireless Propagation Letters, 15, 500-503.

[15]. Tsai, L. C. (2014). A triple-band bow-tie-shaped CPWfed slot antenna for WLAN applications. Progress in Electromagnetics Research C, 47, 167-171.

[16]. Wu, T., Shi, X. W., Li, P., & Bai, H. (2013). Tri band microstrip fed monopole antenna with dual polarisation characteristics for WLAN and WiMAX applications. Electronics Letters, 49(25), 1597-1598.

[17]. Zhang, R., Kim, H. H., & Kim, H. (2015). Triple band ground radiation antenna for GPS, WiFi 2.4 and 5 GHz band applications. Electronics Letters, 51(25), 2082-2084.

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Research Paper

Vaccination Identification System using Raspberry Pi

K. Kiran Kumar* , Velamala Pavan Kumar, Nuthibilli Kumari, Meesala Siva Prasad, Dannana Tarun Kumar

*-***** Aditya Institute of Technology and Management, Tekkali, Andhra Pradesh, India.

Kumar, K. K., Kumar, V. P., Kumari, N., Prasad, M. S., and Kumar, D. T. (2023). Vaccination Identification System using Raspberry Pi. i-manager’s Journal on Electronics Engineering, 13(2), 28-38. https://doi.org/10.26634/jele.13.2.19474

Abstract

The Severe Acute Respiratory Syndrome Coronavirus-2 (SARS-CoV-2) causes Covid-19, an infectious illness. A methodology was created to track the vaccination history of people with the Severe Acute Respiratory Syndrome Coronavirus-2 (SARS-CoV-2) that causes Covid-19, an infectious illness. The system operates on a Raspberry Pi processor that is designed to authenticate the vaccination records of individuals. The Vaccination Identification System consists of various components connected to the Raspberry Pi Zero 2W microprocessor, Pi camera, an LCD display, LED indicators, a buzzer, a DC servo motor, and a PCB converter. The proposed system grants access to vaccinated individuals and denies access to those who are not vaccinated.

References

[1]. Aschwanden, C. (2020). The false promise of herd immunity for COVID-19. Nature, 26-28.

[2]. Bloomberg. (2020). Doctors Come Under Attack in India as Coronavirus Stigma Grows.

[3]. Csiro. (n.d). Making a Vaccine for COVID-19.

[4]. Dhama, K., Khan, S., Tiwari, R., Sircar, S., Bhat, S., Malik, Y. S., ... & Rodriguez-Morales, A. J. (2020). Coronavirus disease 2019–COVID -19. Clinical Microbiology Reviews, 33(4), e00028-20.

[5]. Gambhir, R., & Jha, A. K. (2013). Brushless DC motor: construction and applications. The International Journal of Engineering and Science, 2(5), 72-77.

[6]. Ghosh, M., Ghosh, S., Saha, P. K., & Panda, G. K. (2016). Semi-analytical dynamic model of permanentmagnet direct current brushed motor considering slotting effect, commutation, and PWM-operated terminal voltage. IEEE Transactions on Industrial Electronics, 64(4), 2654-2662.

[7]. HT Correspondent. (2020). Covid-19 Update: Govt Issues Advisory to Stem Social Stigma.

[8]. Hubing, T. H., Drewniak, J. L., Van Doren, T. P., & Hockanson, D. M. (1995). Power bus decoupling on multilayer printed circuit boards. IEEE Transactions on Electromagnetic Compatibility, 37(2), 155-166.

[9]. Liu, B., Liu, P., Dai, L., Yang, Y., Xie, P., Tan, Y., ... & He, K. (2021). Assisting scalable diagnosis automatically via CT images in the combat against COVID-19. Scientific Reports, 11(1), 4145.

[10]. Mahase, E. (2020). Covid-19: Pfizer vaccine efficacy was 52% after first dose and 95% after second dose, paper shows. BMJ, 371.

[11]. McIntosh, K., Hirsch, M. S., & Bloom, A. (2020). Coronavirus disease 2019 (COVID-19). UpToDate Hirsch MS Bloom, 5(1), 873.

[12]. Medical buyer. (2020). Social Stigma Forcing Coronavirus Patients to Avoid Screening in India.

[13]. Polack, F. P., Thomas, S. J., Kitchin, N., Absalon, J., Gurtman, A., Lockhart, S., ... & Gruber, W. C. (2020). Safety and efficacy of the BNT162b2 mRNA Covid-19 vaccine. New England Journal of Medicine, 383(27), 2603-2615.

[14]. Premkumar, K., & Nigel, K. G. J. (2015, March). Smart phone based robotic arm control using raspberry pi, android and Wi-Fi. In 2015 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS) (pp. 1-3). IEEE.

[15]. Roberto, K. J., Johnson, A. F., & Rauhaus, B. M. (2020). Stigmatization and prejudice during the COVID-19 pandemic. Administrative Theory & Praxis, 42(3), 364-378.

[16]. Sanchez-Benitez, D., de la Cruz, J. M., Pajares, G., & Gu, D. (2011). Visual control of a remote vehicle. In Intelligent Robotics and Applications: 4th International Conference, ICIRA 2011, Aachen, Germany, December 6-8, 2011, Proceedings, Part II 4 (pp. 579-588). Springer Berlin Heidelberg.

[17]. Sharma, O., Sultan, A. A., Ding, H., & Triggle, C. R. (2020). A review of the progress and challenges of developing a vaccine for COVID-19. Frontiers in Immunology, 11, 585354.

[18]. WHO. (n.d.). COVID-19 Vaccines.

[19]. WHO. (n.d.). ICRTP Registry Network.

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Research Paper

A Compact Wideband Monopole Antenna with DGS for WiMAX/WLAN/5G Applications

Saumya Gupta* , Samar Pratap Rai, Chandan*, Ashutosh Kumar Singh****

*-**** Department of Electronics and Communication Engineering (IET), Dr. Ram Manohar Lohia Avadh University, Ayodhya, Uttar Pradesh, India.

Gupta, S., Rai, S. P., Chandan, and Singh, A. K. (2023). A Compact Wideband Monopole Antenna with DGS for WiMAX/WLAN/5G Applications. i-manager’s Journal on Electronics Engineering, 13(2), 39-45. https://doi.org/10.26634/jele.13.2.19466

Abstract

In this research, a complex wideband antenna with different applications in wireless communication devices is proposed. The proposed wideband antenna resonates at different four frequencies, which include the wireless devices band, an Ultra-Wideband (UWB), and an X-band. This rectangle-shaped antenna with additional stub antennas has FR4 material used as a substrate with dimensions of (26 × 40 × 1.6 mm3). The resulting resonant frequencies cover Wireless Local-Area Network (WLAN) at 2 GHz and 5.3 GHz, Multiple Input Multiple Output (MIMO) at 6.7 GHz, and X-band at 8.7 GHz. The implementation of Defected Ground Structure (DGS) facilitates the reduction in size and increase in antenna performance, and by using the additional stubs, it provides a multi-sharpened band. It has an omnidirectional radiation pattern. Simulation results show that the proposed antenna provides a wide range of frequencies (4-9 GHz).

References

[1]. Cai, Q., Li, Y., Zhang, X., & Shen, W. (2019). Wideband MIMO antenna array covering 3.3–7.1 GHz for 5G metalrimmed smartphone applications. IEEE Access, 7, 142070-142084.

[2]. Jan, N. A., Kiani, S. H., Sehrai, D. A., Anjum, M. R., Iqbal, A., Abdullah, M., & Kim, S. (2021). Design of a compact monopole antenna for UWB applications. Computers, Materials & Continua, 66(1), 35-44.

[3]. Kemtchang, R. D., Konditi, D. B., & Mwangi, E. (2018). Design of a 2GHz Microstrip Antenna for Wireless Application using Cross-Shaped Patch Aperture. International Journal of Engineering Research and Technology, 11(5), 805-818.

[4]. Mahmud, M. Z., Islam, M. T., Misran, N., Almutairi, A. F., & Cho, M. (2018). Ultra-wideband (UWB) antenna sensor based microwave breast imaging: A review. Sensors, 18(9), 2951.

[5]. Mat, D. A. A., Hui, L. Y., Zaidel, D. N. A., Ping, K. H., & Sahrani, S. (2022). Design of Compact Monopole Antenna with U-Shaped Defected Ground Structure (DGS) for UWB Application. Journal of Telecommunication, Electronic and Computer Engineering (JTEC), 14(3), 11-15.

[6]. Meloui, M., & Essaaidi, M. (2014). A dual ultra wide band slotted antenna for C and X bands application. Progress in Electromagnetics Research Letters, 47, 91-96.

[7]. Parashar, K. K., Singh, V. K., & Tiwari, R. (2014). Microstrip patch antenna for WiMAX/WLAN applications. Advance Physics Letter, 1(1), 34-37.

[8]. Su, S. W. (2010). High-gain dual-loop antennas for MIMO access points in the 2.4/5.2/5.8 GHz bands. IEEE Transactions on Antennas and Propagation, 58(7), 2412-2419.

[9]. Wong, K. L., & Chen, W. Y. (2010). Small size printed loop type antenna integrated with two stacked coupled fed shorted strip monopoles for eight band LTE/GSM/UMTS operation in the mobile phone. Microwave and Optical Technology Letters, 52(7), 1471-1476.

[10]. Zarin, M. T., Khattak, M, I., Saleem, N., & Nasir, J. A. (2018). A printed monopole antenna with DGS for Multiband Wireless Communication. International Journal of Scientific & Engineering, 9(12)

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Review Paper

Analysis of Carbon Nanotube for Low Power Nano Electronics Applications

Pradeep Singh Yadav* , Chinmay Chandrakar, Anil Kumar Sahu*

* Shri Shankaracharya Technical Campus, Bhilai, Chhattisgarh, India.

Rungta College of Engineering and Technology, Bhilai, Chhattisgarh, India.

* Bharat Institute of Engineering and Technology, Hyderabad, India.

Yadav, P. S., Chandrakar, C., and Sahu, A. K. (2023). Analysis of Carbon Nanotube for Low Power Nano Electronics Applications. i-manager’s Journal on Electronics Engineering, 13(2), 46-63. https://doi.org/10.26634/jele.13.2.19383

Abstract

The implementation of nanoelectronic circuits depends on technologies such as Complementary Metal-Oxide Semiconductor (CMOS) or Bipolar CMOS (BICMOS), and the length of the channel can be reduced up to a certain limit. Due to the generation of various errors nanomaterials can be an alternative solution for circuit design. In the field of nanotechnology, Carbon Nanotubes (CNTs) have become a notable and remarkable invention. Their structure is very similar to that of graphite, and its small size, lightweight, high strength, and good conductivity make them ideal building blocks for future technologies. CNTs hold great promise for being the catalyst for the next technological revolution. Today, a broad range of processes is available to produce various types of CNTs, depending on the rolling times of graphite sheets. This review paper sheds light on the different types of CNTs, their properties, methods of synthesis such as arc discharge and chemical vapor deposition, and their applications. To achieve this goal, this paper provides a review that aims to define the state-of-the-art in this field from a novel and unified perspective while elaborating insights of current developments and emerging trends.

References

[1]. Aïssa, B., & El Khakani, M. A. (2009). The channel length effect on the electrical performance of suspended-single-wall-carbon-nanotube-based field effect transistors. Nanotechnology, 20(17), 175203.

[2]. Alam, K., & Lake, R. (2005). Performance of 2 nm gate length carbon nanotube field-effect transistors with source∕ drain underlaps. Applied Physics Letters, 87(7), 073104.

[3]. Appenzeller, J., Knoch, J., Derycke, V., Martel, R., Wind, S., & Avouris, P. (2002). Field-modulated carrier transport in carbon nanotube transistors. Physical Review Letters, 89(12), 126801.

[4]. Appenzeller, J., Lin, Y. M., Knoch, J., & Avouris, P. (2004). Band-to-band tunneling in carbon nanotube field-effect transistors. Physical Review Letters, 93(19), 196805.

[5]. Appenzeller, J., Lin, Y. M., Knoch, J., Chen, Z., & Avouris, P. (2005). Comparing carbon nanotube transistors-the ideal choice: a novel tunneling device design. IEEE Transactions on Electron Devices, 52(12), 2568-2576.

[6]. Avci, U. E., Morris, D. H., & Young, I. A. (2015). Tunnel field-effect transistors: Prospects and challenges. IEEE Journal of the Electron Devices Society, 3(3), 88-95.

[7]. Bachtold, A., Hadley, P., Nakanishi, T., & Dekker, C. (2001). Logic circuits with carbon nanotube transistors. Science, 294(5545), 1317-1320.

[8]. Banerjee, P., & Sarkar, S. K. (2017). 3-D analytical modeling of high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual-material bottom gate for suppressing short channel effects. Journal of Computational Electronics, 16, 631-639.

[9]. Bockrath, M., Hone, J., Zettl, A., McEuen, P. L., Rinzler, A. G., & Smalley, R. E. (2000). Chemical doping of individual semiconducting carbon-nanotube ropes. Physical Review B, 61(16), R10606.

[10]. Burghard, M., Klauk, H., & Kern, K. (2009). Carbon based field effect transistors for nanoelectronics. Advanced Materials, 21(25-26), 2586-2600.

[11]. Chau, R., Datta, S., Doczy, M., Doyle, B., Jin, B., Kavalieros, J., ... & Radosavljevic, M. (2005). Benchmarking nanotechnology for high-performance and low-power logic transistor applications. IEEE Transactions on Nanotechnology, 4(2), 153-158.

[12]. Chau, R., Doyle, B., Doczy, M., Datta, S., Hareland, S., Jin, B., ... & Metz, M. (2003, June). Silicon nanotransistors and breaking the 10 nm physical gate length barrier. In 61st Device Research Conference. Conference Digest (Cat. No. 03TH8663) (pp. 123-126). IEEE.

[13]. Che, Y., Chen, H., Gui, H., Liu, J., Liu, B., & Zhou, C. (2014). Review of carbon nanotube nanoelectronics and macroelectronics. Semiconductor Science and Technology, 29(7), 073001.

[14]. Chen, Z., Appenzeller, J., Solomon, P. M., Lin, Y. M., & Avouris, P. (2006, June). High performance carbon nanotube ring oscillator. In 2006 64th Device Research Conference (pp. 171-172). IEEE.

[15]. Chowdhury, N., Iannaccone, G., Fiori, G., Antoniadis, D. A., & Palacios, T. (2017). GaN nanowire n- MOSFET with 5 nm channel length for applications in digital electronics. IEEE Electron Device Letters, 38(7), 859-862.

[16]. Chu, C. H., Sarangadharan, I., Regmi, A., Chen, Y. W., Hsu, C. P., Chang, W. H., ... & Wang, Y. L. (2017). Beyond the Debye length in high ionic strength solution: Direct protein detection with field-effect transistors (FETs) in human serum. Scientific Reports, 7(1), 1-15.

[17]. Derycke, V., Martel, R., Appenzeller, J., & Avouris, P. (2001). Carbon nanotube inter-and intramolecular logic gates. Nano Letters, 1(9), 453-456.

[18]. Ding, L., Zhang, Z., Liang, S., Pei, T., Wang, S., Li, Y., ... & Peng, L. M. (2012). CMOS-based carbon nanotube pass-transistor logic integrated circuits. Nature Communications, 3(1), 677.

[19]. Dresselhaus, G., Dresselhaus, M. S., & Saito, R. (1998). Physical Properties of Carbon Nanotubes. World scientific.

[20]. Dresselhaus, M. S., Dresselhaus, G., & Jorio, A. (2004). Unusual properties and structure of carbon nanotubes. Annual Review of Materials Research, 34, 247-278.

[21]. Dürkop, T., Getty, S. A., Cobas, E., & Fuhrer, M. S. (2004). Extraordinary mobility in semiconducting carbon nanotubes. Nano Letters, 4(1), 35-39.

[22]. El-Naggar, A., Mansour, A., Wanass, A., & Hassan, S. (2016, April). Comparative review of carbon nanotube FETs. In 2016 Third International Conference on Electrical, Electronics, Computer Engineering and Their Applications (EECEA) (pp. 57-62). IEEE.

[23]. Franklin, A. D., Luisier, M., Han, S. J., Tulevski, G., Breslin, C. M., Gignac, L., ... & Haensch, W. (2012). Sub-10 nm carbon nanotube transistor. Nano Letters, 12(2), 758-762.

[24]. Guo, J., Datta, S., Lundstrom, M., Brink, M., McEuen, P., Javey, A., ... & McIntyre, P. (2002, December). Assessment of silicon MOS and carbon nanotube FET performance limits using a general theory of ballistic transistors. In Digest. International Electron Devices Meeting, (pp. 711-714). IEEE.

[25]. Hou, Y. T., Li, M. F., Low, T., & Kwong, D. L. (2004). Metal gate work function engineering on gate leakage of MOSFETs. IEEE Transactions on Electron Devices, 51(11), 1783-1789.

[26]. Huang, S., Maynor, B., Cai, X., & Liu, J. (2003). Ultralong, well aligned single walled carbon nanotube architectureson surfaces. Advanced Materials, 15(19), 1651-1655.

[27]. Ijeomah, G., Obite, F., & Rahman, O. (2016). Development of carbon nanotube-based biosensors. International Journal of Nano and Biomaterials, 6(2), 83-109.

[28]. Javey, A., Guo, J., Paulsson, M., Wang, Q., Mann, D., Lundstrom, M., & Dai, H. (2004). High-field quasiballistic transport in short carbon nanotubes. Physical Review Letters, 92(10), 106804.

[29]. Javey, A., Guo, J., Wang, Q., Lundstrom, M., & Dai, H. (2003). Ballistic carbon nanotube field-effect transistors. Nature, 424(6949), 654-657.

[30]. Javey, A., Kim, H., Brink, M., Wang, Q., Ural, A., Guo, J., ... & Dai, H. (2002). High-κ dielectrics for advanced carbon-nanotube transistors and logic gates. Nature Materials, 1(4), 241-246.

[31]. Kalbacova, M., Kalbac, M., Dunsch, L., Kataura, H., & Hempel, U. (2006). The study of the interaction of human mesenchymal stem cells and monocytes/macrophages with single walled carbon nanotube films. Physica Status Solidi (B), 243(13), 3514-3518.

[32]. Kong, J., Soh, H. T., Cassell, A. M., Quate, C. F., & Dai, H. (1998). Synthesis of individual single-walled carbon nanotubes on patterned silicon wafers. Nature, 395(6705), 878-881.

[33]. Koswatta, S. O., Valdes-Garcia, A., Steiner, M. B., Lin, Y. M., & Avouris, P. (2011). Ultimate RF performance potential of carbon electronics. IEEE Transactions on Microwave Theory and Techniques, 59(10), 2739-2750.

[34]. Léonard, F. (2008). Physics of Carbon Nanotube Devices. William Andrew.

[35]. Lin, Y., Taylor, S., Li, H., Fernando, K. S., Qu, L., Wang, W., ... & Sun, Y. P. (2004). Advances toward bioapplications of carbon nanotubes. Journal of Materials Chemistry, 14(4), 527-541.

[36]. Liu, J., & Hersam, M. C. (2010). Recent developments in carbon nanotube sorting and selective growth. MRS Bulletin, 35(4), 315-321.

[37]. Lundstrom, M. (2003). Moore's law forever? Science, 299(5604), 210-211.

[38]. Luo, J., Wei, L., Lee, C. S., Franklin, A. D., Guan, X., Pop, E., ... & Wong, H. S. P. (2013). Compact model for carbon nanotube field-effect transistors including nonidealities and calibrated with experimental data down to 9-nm gate length. IEEE Transactions on Electron Devices, 60(6), 1834-1843.

[39]. Macilwain, C. (2005). Computer hardware: silicon down to the wire. Nature, 436, 22-23.

[40]. Marani, R., & Perri, A. G. (2015). The next generation of FETs: CNTFETs. International Journal of Advances in Engineering & Technology, 8(5).

[41]. Martel, R., Derycke, V., Appenzeller, J., Wind, S., & Avouris, P. (2002, June). Carbon nanotube field-effect transistors and logic circuits. In Proceedings of the 39th Annual Design Automation Conference (pp. 94-98).

[42]. Martel, R., Schmidt, T., Shea, H. R., Hertel, T., & Avouris, P. (1998). Single-and multi-wall carbon nanotube field-effect transistors. Applied Physics Letters, 73(17), 2447-2449.

[43]. McEuen, P. L., Fuhrer, M. S., & Park, H. (2002). Singlewalled carbon nanotube electronics. IEEE Transactions on Nanotechnology, 1(1), 78-85.

[44]. Mehrad, M., & Ghadi, E. S. (2017, April). C-shape silicon window nano MOSFET for reducing the short channel effects. In 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) (pp. 164-167). IEEE.

[45]. Mori, T., Iizuka, S., & Nakayama, T. (2017). Material engineering for silicon tunnel field-effect transistors: isoelectronic trap technology. MRS Communications, 7(3), 541-550.

[46]. Odom, T. W., Huang, J. L., Kim, P., & Lieber, C. M. (1998). Atomic structure and electronic properties of single-walled carbon nanotubes. Nature, 391(6662), 62-64.

[47]. Ossaimee, M., Gamal, S., & Shaker, A. (2015). Gate dielectric constant engineering for suppression of ambipolar conduction in CNTFETs. Electronics Letters, 51(6), 503-504.

[48]. Peercy, P. S. (2000). The drive to miniaturization. Nature, 406(6799), 1023-1026.

[49]. Peng, H. B., Hughes, M. E., & Golovchenko, J. A. (2006). Room-temperature single charge sensitivity in carbon nanotube field-effect transistors. Applied Physics Letters, 89(24), 243502.

[50]. Peng, L. M., Zhang, Z., & Wang, S. (2014). Carbon nanotube electronics: Recent advances. Materials Today, 17(9), 433-442.

[51]. Pennington, G., Akturk, A., & Goldsman, N. (2003, December). Electron mobility of a semiconducting carbon nanotube. In International Semiconductor Device Research Symposium, 2003 (pp. 412-413). IEEE.

[52]. Popov, V. N. (2004). Carbon nanotubes: properties and application. Materials Science and Engineering: R: Reports, 43(3), 61-102.

[53]. Radosavljevic, M., Chu-Kung, B., Corcoran, S., Dewey, G., Hudait, M. K., Fastenau, J. M., ... & Chau, R. (2009, December). Advanced high-K gate dielectric for high-performance short-channel In 0.7 Ga 0.3 as quantum well field effect transistors on silicon substrate for low power logic applications. In 2009 IEEE International Electron Devices Meeting (IEDM) (pp. 1-4). IEEE.

[54]. Ren, Z. (2003a). Inversion channel mobility in high-k high performance MOSFETs. In IEEE International Electron Meeting, 2003.

[55]. Ren, Z. (2003b). A., Guo, J., Farmer, D. B., Wang, Q., Yenilmez, E., Gordon, R. G., ... & Dai, H. (2004). Selfaligned ballistic molecular transistors and electrically parallel nanotube arrays. Nano Letters, 4(7), 1319-1322.

[56]. Roy, D., & Biswas, A. (2018). Analytical model of nanoscale junctionless transistors towards controlling of short channel effects through source/drain underlap and channel thickness engineering. Superlattices and Microstructures, 113, 71-81.

[57]. Schroter, M., Claus, M., Sakalas, P., Haferlach, M., & Wang, D. (2013). Carbon nanotube FET technology for radio-frequency electronics: State-of-the-art overview. IEEE Journal of the Electron Devices Society, 1(1), 9-20.

[58]. Service, R. F. (2009). Is silicon's reign nearing its end? Science, 323(5917), 1000-1002.

[59]. Singh, A., Khosla, M., & Raj, B. (2015, October). Comparative analysis of carbon nanotube field effect transistors. In 2015 IEEE 4th Global Conference on Consumer Electronics (GCCE) (pp. 552-555). IEEE.

[60]. Smalley, R. E. (1998). Crystalline ropes of metallic carbon nanotubes. In Supercarbon: Synthesis, Properties and Applications (pp. 31-40). Springer Berlin Heidelberg.

[61]. Stephan, O., Ajayan, P. M., Colliex, C., Redlich, P., Lambert, J. M., Bernier, P., & Lefin, P. (1994). Doping graphitic and carbon nanotube structures with boron and nitrogen. Science, 266(5191), 1683-1685.

[62]. Streetman, B. G., & Banerjee, S. (2000). Solid State Electronic Devices (Vol. 4). Prentice hall, New Jersey.

[63]. Sun, D. M., Timmermans, M. Y., Tian, Y., Nasibulin, A. G., Kauppinen, E. I., Kishimoto, S., ... & Ohno, Y. (2011). Flexible high-performance carbon nanotube integrated circuits. Nature Nanotechnology, 6(3), 156-161.

[64]. Svensson, J. (2010). Carbon Nanotube Transistors: Nanotube Growth, Contact Properties and Novel Devices (Doctoral thesis, University of Gothenburg).

[65]. Tans, S. J., Verschueren, A. R., & Dekker, C. (1998). Room-temperature transistor based on a single carbon nanotube. Nature, 393(6680), 49-52.

[66]. Terrones, M. (2003). Science and technology of the twenty-first centur y: synthesis, properties, and applications of carbon nanotubes. Annual Review of Materials Research, 33(1), 419-501.

[67]. Tulevski, G. S., Franklin, A. D., Frank, D., Lobez, J. M., Cao, Q., Park, H., ... & Haensch, W. (2014). Toward highperformance digital logic technology with carbon nanotubes. ACS Nano, 8(9), 8730-8745.

[68]. Usmani, F. A., & Hasan, M. (2010). Carbon nanotube field effect transistors for high performance analog applications: An optimum design approach. Microelectronics Journal, 41(7), 395-402.

[69]. Wind, S. J., Appenzeller, J., Martel, R., Derycke, V., & Avouris, P. (2002). Vertical scaling of carbon nanotube field-effect transistors using top gate electrodes. Applied Physics Letters, 80(20), 3817-3819.

[70]. Wong, H. S. P. (2005). Beyond the conventional transistor. Solid-State Electronics, 49(5), 755-762.

[71]. Yang, M. H., Teo, K. B., Gangloff, L., Milne, W. I., Hasko, D. G., Robert, Y., & Legagneux, P. (2006). Advantages of top-gate, high-k dielectric carbon nanotube field-effect transistors. Applied Physics Letters, 88(11), 113507.

[72]. Yang, N., Chen, X., Ren, T., Zhang, P., & Yang, D. (2015). Carbon nanotube based biosensors. Sensors and Actuators B: Chemical, 207, 690-715.

[73]. Zhang, J., Lin, A., Patil, N., Wei, H., Wei, L., Wong, H. S. P., & Mitra, S. (2012). Carbon nanotube robust digital VLSI. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(4), 453-471.

[74]. Zhang, Z. Y., Wang, S., Ding, L., Liang, X. L., Xu, H. L., Shen, J., ... & Peng, L. M. (2008). High-performance ntype carbon nanotube field-effect transistors with estimated sub-10-ps gate delay. Applied Physics Letters, 92(13), 133117.

[75]. Zhang, Z., Liang, X., Wang, S., Yao, K., Hu, Y., Zhu, Y., ... & Peng, L. M. (2007). Doping-free fabrication of carbon nanotube based ballistic CMOS devices and circuits. Nano Letters, 7(12), 3603-3607.

[76]. Zhang, Z., Wang, S., Ding, L., Liang, X., Pei, T., Shen, J., ... & Peng, L. M. (2008). Self-aligned ballistic n-type single-walled carbon nanotube field-effect transistors with adjustable threshold voltage. Nano Letters, 8(11), 3696-3701.

[77]. Zhang, Z., Wang, S., Wang, Z., Ding, L., Pei, T., Hu, Z., ... & Peng, L. M. (2009). Almost perfectly symmetric SWCNT-based CMOS devices and scaling. ACS Nano, 3(11), 3781-3787.

[78]. Zhou, C., Kong, J., Yenilmez, E., & Dai, H. (2000). Modulated chemical doping of individual carbon nanotubes. Science, 290(5496), 1552-1555.

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