Abstract

Degradation problem in the waste to energy plants, based on various different types of waste as fuels is very serious and still require technological solution in order to improve their efficiency. This study found that in the aggressive environment of waste to energy plants, different coating compositions with the different techniques tested, still did not give the desired results at the elevated temperature and still these plants, are running at very less efficiency as compared to fossil fuel based power plants. It is found from the previous work that the spray coating like APS, HVOF, HVSFS, Cold Spray coatings reduce the surface degradation in the diesel engines, gas turbines, coal gasification plants and chemical plants. Now a days nano-coating give good results to increase the life and performance of surfaces. Nano scale materials have achieved much attention in recent years due to their outstanding properties compared to those of micron-size counterparts. It is found that particle size strongly influences the particle thermal history as small particles rapidly heat up and also rapidly cool down. It also affects the interlamellar adhesion of the splats and hence influencing the mechanical properties of the coating. But the main hurdle in the nano powder coating is that nano-powders are expensive and not available in the market easily and in bulk. So a suitable method has to be found out to manufacture nano-powders in bulk and less expensive, so that they can be used as commercially viable coatings on the surfaces. This paper reviews the previous research work to understand the reason of less efficiency of the WTE plant and different preventive measures used to increase the efficiency of these plants.

Abstract

Compaction testing methods allow at-speeddetecting of errors while possessinga low cost of implementation.Owing to this distinctive feature, compaction methods have been widely used for built-in testing, as well asexternal testing. In the latter case, the bandwidth requirements tothe automated test equipment employed are relaxedwhich reduces the overall cost of testing.Concurrent compaction testing methods use operational signals to detect misbehavior of the device under test and do not require input test stimuli. These methods have been employed for digital systems only. In the present work, we extend the use of compaction methods for concurrent testing of analog-to-digital converters. We estimate tolerance bounds for the result of compaction and evaluate the aliasing rate.

Abstract

In deep submicron technology the performance of VLSI circuits is limited by interconnect rather than device. The non-ideal effects viz. delay, power dissipation and cross-talk on the VLSI chips are highly dependent on the global interconnects. For signal integrity the crosstalk and timing constraints are gaining great importance. This paper presents in depth analysis of transition time and skew variation on the crosstalk and delay. It is shown that faster transition time affect behaviour of coupled interconnect lines. All possible input switching patterns are considered for finding worst crosstalk condition. Moreover the impact of temperature is also analysed on the crosstalk and delay. Design results are obtained using SPICE simulations for 70nm and 130nm technology.

Abstract

Design of low power and high speed VLSI circuit has become a necessity for high performance portable devices operated by batteries. In this paper, power dissipation and switching speed of a 1- bit CMOS full adder in deep submicron and nanoscale technologies are analysed. Effects of variations in supply voltage and temperature on power dissipation and switching speed of a CMOS full adder are analysed. MICROWIND and DSCH 3.1 EDA tools are used for the schematic layout and simulation of a CMOS full adder in 0.4µm and 90 nm technologies using BSIM4 model.

Abstract

Light Emitting Diodes (LEDs) are low cost electronic devices widely used for displays. One of LED properties, apart from the ability to emit light, is to operate as a photo sensor. Thus, a LED may be simultaneously used as a display element and as a sensing element. This characteristic may implement electronic displays with touch sensing capability. In this paper, we describe the development of a display prototype that senses a finger touch and alters its operation. This operation may be extended to multi-touch sensing, boosting displays performance while keeping hardware requirements to the same level. It is worth mentioning that the sensing ability is provided by software, exploiting LED sensing capability, with the same hardware as this used for displaying purposes. The implication of this project is the ability to construct displays that their operation can be dynamically configured without any other hardware overhead or any additional cost. Also, the sensing capability of LEDs may be used to develop optical serial communication between two devices. Thus, LEDs may implement communication functions at a minimal cost and in cases where other technologies are expensive (infrared, bluetooth, etc). For example, the power light of a device may be used for maintenance reports or firmware update with the existing hardware. Our experimentation has shown that LEDs are inexpensive elements that may offer interested advantages both for displaying and sensing purposes.

Abstract

Modern computing system requires having feature of low power consumption. Attempt has been made in this direction & observed that we can attempt to reduce power consumption via adding logic circuit which in turn reduces delay in system. In such case the power requirement is mainly influenced by transition activity, which defines dynamic component of power consumption. Many encoding methods known as “Bus Encoding Technique” have been proposed to reduce transition activity.  Based upon features of bus encoding scheme, specific application has been proposed. Gray encoding scheme is credited as fundamental encoding scheme recommended for generalized application. Many factors were used to find out efficiency of any encoding method. Power requirement and delay are proven to be inversely proportional to each other. Recommendation of CODEC depends upon overhead results. This paper aims to target Gray Encoding scheme for calculating power. Work has been further extended to consider practical application in 0.25-micro meter manufacturing technology. Overhead has been calculated in terms of power consumed, against communication. It has resulted in 109.036603 milli watts of power dissipation.

Abstract

Abstract

Many research groups attempt to extend Moore's law for digital circuits beyond the expected end of the CMOS scaling by proposing alternate devices. Designing MOSFETs with channel lengths much smaller than a micrometre is a challenge, and creates the problems in device fabrication, which limits advancing the integrated circuit. Small size of the MOSFET below a few tens of nanometres creates the low Trans-conductance, gate oxide leakage, low ON-current, Mobility degradation and increased delay. Problems observed in the MOSFET when size is reduced are avoided in CNTFET. Since in case of CNTFET carbon nanotube is used as channel and high-k material is used as gate dielectric. and also our result shows that CNTFET exhibit the better performance than MOSFET in current conduction, In this paper, we present the spice model creation of MOSFET like CNTFET, current-voltage characteristics of an emerging nano device with classical behavior MOSFET like CNTFET. Specifically we have concentrated semi conducting carbon nanotube field effect transistor (SCNTFET), Device has been simulated using spice and also investigate the performance of digital inverter gates based on semi-conducting CNTFET.

Abstract

A “Bragg Grating is a periodic perturbation of the effective absorption coefficient or effective index of an optical wave guide. A fiber Bragg grating (FBG) is a type of distributed Bragg reflector constructed in a short segment of optical fiber that reflects particular wavelength of light and transmits all others. This is achieved by adding a periodic variation to the refractive index of the fiber core. Several devices for wavelength division multiplexing (WDM) systems which utilize mode conversion in waveguides have been proposed and demonstrated. This paper demonstrates the calculation on mode coupling coefficient for the case of planar waveguide structures. We have carried out the computation for the mode coupling coefficient for the cases of degenerate as well as non-degenerate mode. Finally the interpretation of the results is carried out. The performance of FBG due to waveguide structure is predicted. We have to use FBG as a WDM component to accommodate the more number of channels. For this application we need to increase the reflection bandwidth of the reflectivity spectrum. We are also required to reduce the chirp induced in the phase spectrum due to mode coupling.  These all the performance parameters depend on the mode coupling coefficient. Hence; we try to optimize the coupling coefficient for the given cases. Finally the quantitative study has been carried out.