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i-manager's Journal on Electronics Engineering (JELE)

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Volume 9 Issue 3 March - May 2019

Research Paper

Implications of the Internet of Things (IoT) on Future Systems Integration

Tom Page*

Department of Product Design, Nottingham Trent University, England.

Page, T. (2019). Implications of the Internet of Things (IoT) on Future Systems Integration. i-manager’s Journal on Electronics Engineering , 9(3), 1-13. https://doi.org/10.26634/jele.9.3.14701

Abstract

The Internet of Things (IoT) is currently experiencing a lag in consumer adoption potentially due to the industry led technology push with little consideration of consumer needs. This research aimed to assess current consumer awareness and adoption whilst in addition analysing future interest in IoT products or services and the barriers preventing adoption. Initial research involved a literature review of concept origins, technology, applications, data management, and standards for the IoT. Additional research was undertaken using a mixed methodology approach comprising of semistructured informal interviews and a structured online questionnaire survey both performed using members of the general public. The results revealed a current overall poor awareness and adoption of IoT products and services, however, a significant interest in future adoption. Various communication and technical barriers were also identified preventing current interest from actual adoption. The research discusses key insights from data collection which could aid in the removal of observed barriers. These insights involved increased consumer education, development of greater product benefit, and the introduction of standards to ensure interoperability. Application of these research findings could help enable increased widespread adoption of IoT products and service.

References

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[9]. Hanson, J. (2017). IoT Security: 10 Challenges of Securing IoT Communications. PubNub. Retrieved from: https://www.pubnub.com/blog/2015-05-04-10- challenges-securing-iot-communications-iot-security/

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[13]. Lim, S. Y., & Anderson, E. G. (2016, January). Institutional Barriers against Innovation Diffusion: From the perspective of digital health startups. In 2016 49^th Hawaii International Conference on System Sciences (HICSS) (pp. 3328-3337). IEEE. doi: 10.1109/hicss.2016.415

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[17]. Mishra, D., Gunasekaran, A., Childe, S. J., Papadopoulos, T., Dubey, R., & Wamba, S. (2016). Vision, applications and future challenges of Internet of Things: A bibliometric study of the recent literature. Industrial Management & Data Systems, 116(7), 1331-1355. doi: 10.1108/ imds-11-2015-0478

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[23]. Rich, E., & Miah, A. (2016). Mobile, wearable and ingestible health technologies: Towards a critical research agenda. Health Sociology Review, 26(1), 84-97. doi: 10.1080/14461242.2016.1211486

[24]. Stojkoska, B. L. R., & Trivodaliev, K. V. (2017). A review of Internet of Things for smart home: Challenges and solutions. Journal of Cleaner Production, 140, 1454-1464.

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[26]. Sheehy, C., Hogan, O. & Jayasuriya, R. (2015). BSI the economic contribution of standards to the UK economy UK EN. Retrieved from https://www.bsigroup. com/LocalFiles/en-GB/standards/ BSI-standards-research-report-The-Economic-Contribution -of- Standards-to-the-UK-Economy-UK-EN.pdf

[27]. Shin, D. H. (2017). Conceptualizing and measuring quality of experience of the Internet of Things: Exploring how quality is perceived by users. Information & Management, 54(8), 998-1011. doi: 10.1016/j.im. 2017.02.006

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Research Paper

Square Root Carry Select Adder Using MTTSPC D-Latch in 90nm Technology

Prasad M.* , U. B. Mahadevaswamy, Prashant Dandavatimath*

*_***Department of Electronics and Communication Engineering, Sri Jayachamarejendra college of Engineering, Mysuru, Karnataka, India.

Prasad, M., Mahadevaswamy, U. B., & Dandavatimath, P. (2019). Square Root Carry Select Adder Using MTTSPC D-Latch in 90nm Technology. i-manager's Journal on Electronics Engineering, 9(3), 14-25. https://doi.org/10.26634/jele.9.3.15267

Abstract

Adders have always been area of continual research in VLSI for high speed data path design. There have been different architectures proposed with design metrics and both the structures are compared for the parameters of power consumption and delay. In the proposed architecture using True single phase clocked (TSPC), D-Latch for square root (SQRT) carry select look ahead adder is compared with Multi-Threshold complementary metal oxide semiconductor (CMOS) D-latch based design. The design shows power dissipation reduction about 56% than that of MTCMOS. Further the proposed architecture using Multi-Threshold TSPCD-Latch for SQRT carry select look ahead adder is compared with Multi-Threshold CMOSD-latch based designs, the design with TSPC shows the power delay product reduction about 11%. Further, the proposed design is compared with different existing carry select adder designs. Hence, the proposed structure which has small area and less power consumption is implemented for 8-bit adder to reduce the power consumption and delay.

References

[1]. Akashe, S., Tiwari, N. K., Shrivas, J., & Sharma, R. (2012, August). A novel high speed & power efficient half adder design using MTCMOS Technique in 45 nanometre regime. In 2012 IEEE International Conference on Advanced Communication Control and Computing Technologies (ICACCCT) (pp. 157-161). IEEE. doi: 10.1109/ICACCCT.2012.6320761

[2]. Asthana, A., & Akashe, S. (2013). Power efficient D Flip Flop Circuit using MTCMOS Technique in Deep Submicron Technology. International Journal of Engineering Research & Technology, 2(11), 1785-1791.

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[4]. Das, A., Mandal, S. K., & Das, J. K. (2015). High speed Square Root Carry Select Adder using MTCMOS D-Latch in 45nm technology. In 2015 International Conference on Electrical, Electronics, Signals, Communication and Optimization (EESCO).

[5]. He, Y., Chang, C. H., & Gu, J. (2005, May). An area efficient 64-bit square root carry-select adder for low power applications. In 2005 IEEE International Symposium on Circuits and Systems (pp.4082-4085). doi:10.1109/ ISCAS.2005.1465528

[6]. Kim, Y., & Kim, L. S. (2001, May). A low power carry select adder with reduced area. In ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No. 01CH37196) (Vol. 4, pp. 218-221). IEEE. doi:10.1109/iscas.2001.922211

[7]. Leblebici, Y. (1996). CMOS Digital Integrated Circuits: Analysis and Design. McGraw-Hill.

[8]. Manju, S., & Sornagopal, V. (2013, January). An efficient SQRT architecture of carry select adder design by common Boolean logic. In 2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT) (pp. 1-5). IEEE.

[9]. Mugilvannan, L., & Ramasamy, S. (2013, July). Low-power and area-efficient carry select adder using modified BEC-1 converter. In 2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT) (pp. 1-5). IEEE.

[10]. Naik, M. V. K. (2015, March). Design of carry select adder for low-power and high speed VLSI applications. In 2015 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT) (pp. 1-4). IEEE.

[11]. Pandey, S. S., Bakshi, A., & Sharma, V. (2013). 128 Bit Low Power, Area -Efficient Carr y Select Adder. International Journal of Computer Applications, 69(6), 29-33.

[12]. Priya, R., & Kumar, J. S. (2013, March). Implementation and comparison of effective area efficient architectures for CSLA. In 2013 IEEE International Conference ON Emerging Trends in Computing, Communication and Nanotechnology (ICECCN) (pp. 287-292). IEEE. doi:10.1109/ice-ccn.2013.6528510

[13]. Ramkumar, B., & Kittur, H. M. (2011). Low-power and area-efficient carry select adder. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(2), 371- 375. doi:10.1109/tvlsi.2010.2101621

[14]. Shanigarapu, L., & Shrivastava, B. P. (2013). Area & Power efficient Carry Select Adder. International Journal of Innovative Research in Technology & Science (IJIRTS), 1(3), 40-47.

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Research Paper

Design of High Performance Pulse Generator to Perform Automatic Test in VLSI Circuits

P. Lokesh* , V. Thrimurthulu, L. Mihira Priya*

*_***Department of Electronics and Communication Engineering, Chadalawada Ramanamma Engineering College, Tirupati, India.

Lokesh, P., Thrimurthulu, V., & Priya, L. M. (2019). Design of High Performance Pulse Generator to Perform Automatic Test in VLSI Circuits. i-manager's Journal on Electronics Engineering, 9(3), 26-31. https://doi.org/10.26634/jele.9.3.15953

Abstract

VLSI is the advanced technology mainly intended to incorporate million of transistors or ICs placed on a printed circuit board. As the technology advances, System on Chip (SoC) parameters are scaled to achieve high throughputs. Also different test patterns, Automatic Test Equipment, Automatic test pattern generators are important for testing memory, and device under Test ICs are required to find the faulty chips and hence nesecessary of Automatic Test pattern genetators, which help not only to increase the performance of the circuit, but also increase the life time of the component. In this paper, a high accuracy and wide data rate range pulse generator with 10 ps time resolution is presented to perform Automatic Test. The pulse generator works with two modules like Edge Combiner (EC) and Multi phase clock Generator (MPCG). Edge Combiner focuses on explaining the functionality of data range and timing resolution based on phase selection logic and also down counter. In Multi Phase Clock Generator, a Multiphase Oscillator (MPO) holds a ring oscillator scheme to extend operational frequency. Another advantage of multi phase oscillator is to reduce output phase errors if there is any layout mismatches. The design was implemented on 32 Nanometer CMOS technology with Virtex FPGA is the target Hardware device. Experimental results prove that the Area occupied and power consumed by the proposed pulse generators are found to have Low area and low power consumption, respectively.

References

[1]. Agilent Technologies. (2009). Agilent 81100 Family of Pulse Pattern Generators. Retrieved from http://literature. cdn.keysight.com/litweb/pdf/5980-1215E.pdf

[2]. Analog Devices. (2007). Retrieved from http://www.analog.com/media/en/technicaldocumenta tion/data-sheets/ADATE207.pdf

[3]. Arkin, B. (2004, February). Realizing a production ATE custom processor and timing IC containing 400 independent low-power and high-linearity timing verniers. In 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No. 04CH37519) (pp. 348-349). IEEE.

[4]. Chen, P., Chen, P. Y., Lai, J. S., & Chen, Y. J. (2009). FPGA vernier digital-to-time converter with 1.58 ps resolution and 59.3 minutes operation range. IEEE Transactions on Circuits and Systems I: Regular Papers, 57(6), 1134-1142.

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[7]. Liu, J. C., & Lee, P. Y. (2016). A low power pulse generator for test platform applications. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 99(7), 1415- 1416.

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[9]. Okayasu, T., Suda, M., Yamamoto, K., Kantake, S., Sudou, S., & Watanabe, D. (2006, February). 1.83 psresolution CMOS dynamic arbitrary timing generator for 4 GHz ATE applications. In 2006 IEEE International Solid State Circuits Conference-Digest of Technical Papers (pp. 2122-2131). IEEE.

[10]. Ryu, K., Jung, D. H., & Jung, S. O. (2013, September). All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rate. In 2013 Proceedings of the ESSCIRC (ESSCIRC) (pp. 41-44). IEEE.v

[11]. SRS - Stanford Research Systems. (2006). DG535 Digital Delay and Pulse Generator. Retrieved from http://www.thinksrs.com/downloads/PDFs/Catalog/DG53 5c.pdf

[12]. Tektronix. (2012). Arbitrary Waveform Generators- AWG5000 Series. Retrieved from http://tw.tek. com/sites/tek.com/files/media/media/resources/76W_2 2260_9.pdf

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files/media/media/resources/AWG4000Arbitrary- Waveform-GeneratorsDatasheet 76W602550_2.pdf

[14]. Wang, T. Y., Lin, S. M., & Tsao, H. W. (2004). Multiple channel programmable timing generators with single cyclic delay line. IEEE Transactions on Instrumentation and Measurement, 53(4), 1295-1303.

[15]. Yamamoto, K., Suda, M., & Okayasu, T. (2007, September). 2GS/s, 10ps Resolution CMOS Differential Time-to-Digital Converter for Real-Time Testing of Source- Synchronous Memory Device. In 2007 IEEE Custom Integrated Circuits Conference (pp. 145-148). IEEE.

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Research Paper

UAV: A Novel Approach Towards Armed Conflicts

Chalamaneni Jeevan Prasad* , Uppalapati Somalatha**

*Department of Electronic Communication and Engineering, VEMU Institute of Technology, Andhra Pradesh, India.

**Indian Institute of Technology, Andhra Pradesh, India.

Prasad, C. J., Somalatha, U. (2019). UAV: A Novel Approach Towards Armed Conflicts. i-manager's Journal on Electronics Engineering, 9(3), 32-37. https://doi.org/10.26634/jele.9.3.15181

Abstract

In this paper, the rapidly emerging global landscape, introduction, working, and new implementations of remotely piloted aerial vehicles which will be highly effective for use in defence has been explained. This paper presents a novel way for effective functioning and to reduce the problems encountered by military personnel. This UAV is merely different from that of the existing UAVs. This UAV possesses single propeller connected to a brushless motor present in the middle of the UAV and it has excellent subsystem with a good recovery system, which will be useful in recovering data back. It has the technology that can reproduce its energy (power) back as a boots trapper is connected to the rotor where it will power back. It has different sensors like Ultrasonic Sensor (to detect obstacle), Chemical Sensor (to detect chemicals), Sensing Sensor (to operate UAV), etc. It can not only fly, but also can move on the earth. It can adjust to various o environmental conditions. It has a good battery system (it can work for long time). The camera can rotate in 360 and it will give 3D image processing. It works not only on GPS, but also on sensor. This UAV contains high security to data, if caught by an opponent they cannot read the data. If anyone wants to see data, then the person who is operating or the commander chief's biometric is needed. The UAV has an option of auto pilot (autonomous riding capacity). This research work mainly deals with army personnel as these type of UAVs could save many lives. Finally, the paper identifies a specific comprehensive manner for the future policy in military applications.

References

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[4]. Corrigan, F. (2019). 10 Thermal Vision Cameras For Drones and How Thermal Imaging Works. Retrieved from www.dronezon.com/learn-about-drones-quadcopters/9 -heat-vision-cameras- for-drones-and-how-thermal-imaging- works/

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[17]. Stevenson, J. D., Young, S., & Rolland, L. (2015). Beyond Line of Sight Control of Small Unmanned Aerial Vehicles using a Synthetic Environment to Augment First Person Video. 3, 960-967.

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[20]. Wang, J., Garratt, M., Lambert, A., Wang, J. J., Han, S., Sinclair, D. (2008). Integration of GPS/INS/VISION Sensors to Navigate Unmanned Aerial Vehicles. The International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences,37,963-970.

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Research Paper

An Electronics Solution to Facilitate Smart City for Waste Management

Deepali M. Adat* , Prashant V. Mane Deshmukh, S. K. Tilekar*, B. P. Lagaonkar****

,Shankarrao Mohite College, Akluj, Solapur, India.

Department of Electronics, Jayawantrao Sawant College of Commerce and Science, Hadapsar, Pune, India.

****Department of Electronics, Shankarrao Mohite College, Akluj, Solapur, India.

Adat, D. M., Deshmukh, P. V. M., Tilekar, S. K., & Lagaonkar, B. P. (2019). An Electronics Solution to Facilitate Smart City for Waste Management. i-manager's Journal on Electronics Engineering, 9(3), 38-44. https://doi.org/10.26634/jele.9.3.15179

Abstract

Recently, Government of India has been implementing the schemes of smart city for various cities. The smart city services such as transportation, security, water distribution, electricity distribution, environmental pollution monitoring, waste management, etc., are the major services, which should be made smart to realize the theme of smart city. Out of these services, waste management plays a commendable role in making the city smart. Collections of waste management of the same are the major problems in many cities. Therefore, the present research work is undertaken for designing of smart electronic solution for waste management. To achieve the desired goal of waste management of smart city, an innovative technology, called popular embedded technology and Wireless Sensor Network (WSN) are used, where embedded technology helps to design the application and user interface layer and the WSN helps to integrate communication layer with application layer. Out of several concepts of Smart City, the authors have selected to facilitate the smart dustbin for smart city. The hardware part of the system is wired about PIC microcontroller and for wireless communication, the IEEE 805.15.4 standard based Zigbee module is strengthened. In addition to this, to monitor the waste, the weight and level sensor is used. The software part is developed in embedded system and after that calibration system is implemented for desired application typically dustbin monitoring. On investigation, the system works with reliability and high accuracy.

References

[1]. Adat, D. M., Deshmukh, P. V., Tilekar, S. K., & Ladgaonkar, B. P. (2017). Smart fusion based cSoC for Wireless Sensor Network for agricultural applications. International Journal of Scientific Research in Science, Engineering and Technology, 3(5), 161-168.

[2]. Akyildiz, I. F., Su, W., Sankarasubramaniam, Y., & Cayirci, E. (2002). Wireless Sensor Networks: A survey. Computer Networks, 38(4), 393-422.

[3]. Boddu, R., Balanagu, P., & Babu, S. S. (2012). ZigBee based Mine Safety Monitoring System with GSM. International Journal of Computer and Communication Technology, 3(5) 63-67.

[4]. Datasheet of PIC Microcontroller. (n.d). Retrieved from www.alldatasheet.com/Pic16f877

[5]. Deshmukh P. M. (2018). Designing of Wireless Sensor Network to protect agricultural farm from wild animals. i-manager's Journal on Information Technology, 7(4), 30- 36.

[6]. Deshmukh, P. M., Adat, D. M., Ladgaonakar, B. P., & Tilekar, S. K. (2018a). Designing of an Embedded System for Wireless Sensor Network for Hazardous Gas Leakage control for industrial application. i-manager's Journal on Embedded Systems, 6(2), 1-9.

[7]. Deshmukh, P. M., Adat, D. M., Ladgaonkar, B. P., & Tilekar, S. K. (2018b). Monitoring and Control of Gas Leakages of Industrial Sector using PIC 18F4550, ZigBee and Wireless Sensor Actuator Network. i-manager's Journal on Electronics Engineering, 8(3), 5-13.

[8]. Deshmukh, P. M., Ladgaonkar, B. P., Pathan, S. C., & Shaikh, S. S. (2013). Microcontroller PIC 18f4550 based Wireless Sensor Node to monitor industrial environmental parameters. International Journal of Advanced Research in Computer Science and Software Engineering, 3(10), 943-950.

[9]. Deshmukh, P. M., Pathan, S. C., Chanvan, S. V., Tilekar, S. K., & Ladgaonkar, B. P. (2016). Wireless Sensor Network for monitoring of air pollution near industrial sector. International Journal of Advanced Research in Computer Science and Software Engineering, 6(6), 638-645.

[10]. Indi A., Sukrithalal N. and Babu G., Jha, J. (2017). Garbage Management System for Smart City, International Journal of Engineering Research & Technology, 5 (01), 38-41.

[11]. Kumar, N. M., Goel, S., & Mallick, P. K. (2018, March). Smart cities in India: Features, policies, current status, and challenges. In 2018 Technologies for Smart-City Energy Security and Power (ICSESP) (pp. 1-4). IEEE.

[12]. Kumbhar, N. N., & Mane-Deshmukh, P. V. (2017). Smart Door Locking System using Wireless Communication Technology. International Journal for Research in Applied Science & Engineering Technology, 5(8), 507-512.

[13]. Liu, J., Xiong, K., Fan, P., & Zhong, Z. (2017). RF energy harvesting wireless powered sensor networks for smart cities. IEEE Access, 5, 9348-9358.

[14]. Monika, K. A., Rao, N., Prapulla, S. B., & Shobha, G. (2016). Smart dustbin-an efficient garbage monitoring system. International Journal of Engineering Science and Computing, 6(6), 7113-7116.

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i-manager's Journal on Electronics Engineering (JELE)

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Volume 9 Issue 3 March - May 2019

Implications of the Internet of Things (IoT) on Future Systems Integration

Tom Page*

Department of Product Design, Nottingham Trent University, England.

Page, T. (2019). Implications of the Internet of Things (IoT) on Future Systems Integration. i-manager’s Journal on Electronics Engineering , 9(3), 1-13. https://doi.org/10.26634/jele.9.3.14701

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Square Root Carry Select Adder Using MTTSPC D-Latch in 90nm Technology

Prasad M.* , U. B. Mahadevaswamy**, Prashant Dandavatimath***

*_***Department of Electronics and Communication Engineering, Sri Jayachamarejendra college of Engineering, Mysuru, Karnataka, India.

Prasad, M., Mahadevaswamy, U. B., & Dandavatimath, P. (2019). Square Root Carry Select Adder Using MTTSPC D-Latch in 90nm Technology. i-manager's Journal on Electronics Engineering, 9(3), 14-25. https://doi.org/10.26634/jele.9.3.15267

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Design of High Performance Pulse Generator to Perform Automatic Test in VLSI Circuits

P. Lokesh* , V. Thrimurthulu**, L. Mihira Priya***

*_***Department of Electronics and Communication Engineering, Chadalawada Ramanamma Engineering College, Tirupati, India.

Lokesh, P., Thrimurthulu, V., & Priya, L. M. (2019). Design of High Performance Pulse Generator to Perform Automatic Test in VLSI Circuits. i-manager's Journal on Electronics Engineering, 9(3), 26-31. https://doi.org/10.26634/jele.9.3.15953

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UAV: A Novel Approach Towards Armed Conflicts

Chalamaneni Jeevan Prasad* , Uppalapati Somalatha**

*Department of Electronic Communication and Engineering, VEMU Institute of Technology, Andhra Pradesh, India. **Indian Institute of Technology, Andhra Pradesh, India.

Prasad, C. J., Somalatha, U. (2019). UAV: A Novel Approach Towards Armed Conflicts. i-manager's Journal on Electronics Engineering, 9(3), 32-37. https://doi.org/10.26634/jele.9.3.15181

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An Electronics Solution to Facilitate Smart City for Waste Management

Deepali M. Adat* , Prashant V. Mane Deshmukh**, S. K. Tilekar***, B. P. Lagaonkar****

*,***Shankarrao Mohite College, Akluj, Solapur, India. **Department of Electronics, Jayawantrao Sawant College of Commerce and Science, Hadapsar, Pune, India. ****Department of Electronics, Shankarrao Mohite College, Akluj, Solapur, India.

Adat, D. M., Deshmukh, P. V. M., Tilekar, S. K., & Lagaonkar, B. P. (2019). An Electronics Solution to Facilitate Smart City for Waste Management. i-manager's Journal on Electronics Engineering, 9(3), 38-44. https://doi.org/10.26634/jele.9.3.15179

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Prasad M.* , U. B. Mahadevaswamy, Prashant Dandavatimath*

P. Lokesh* , V. Thrimurthulu, L. Mihira Priya*

*Department of Electronic Communication and Engineering, VEMU Institute of Technology, Andhra Pradesh, India.

**Indian Institute of Technology, Andhra Pradesh, India.

Deepali M. Adat* , Prashant V. Mane Deshmukh, S. K. Tilekar*, B. P. Lagaonkar****

,Shankarrao Mohite College, Akluj, Solapur, India.

Department of Electronics, Jayawantrao Sawant College of Commerce and Science, Hadapsar, Pune, India.

****Department of Electronics, Shankarrao Mohite College, Akluj, Solapur, India.