Design of High Performance Pulse Generator to Perform Automatic Test in VLSI Circuits

P. Lokesh*, V. Thrimurthulu**, L. Mihira Priya***
*_***Department of Electronics and Communication Engineering, Chadalawada Ramanamma Engineering College, Tirupati, India.
Periodicity:March - May'2019


VLSI is the advanced technology mainly intended to incorporate million of transistors or ICs placed on a printed circuit board. As the technology advances, System on Chip (SoC) parameters are scaled to achieve high throughputs. Also different test patterns, Automatic Test Equipment, Automatic test pattern generators are important for testing memory, and device under Test ICs are required to find the faulty chips and hence nesecessary of Automatic Test pattern genetators, which help not only to increase the performance of the circuit, but also increase the life time of the component. In this paper, a high accuracy and wide data rate range pulse generator with 10 ps time resolution is presented to perform Automatic Test. The pulse generator works with two modules like Edge Combiner (EC) and Multi phase clock Generator (MPCG). Edge Combiner focuses on explaining the functionality of data range and timing resolution based on phase selection logic and also down counter. In Multi Phase Clock Generator, a Multiphase Oscillator (MPO) holds a ring oscillator scheme to extend operational frequency. Another advantage of multi phase oscillator is to reduce output phase errors if there is any layout mismatches. The design was implemented on 32 Nanometer CMOS technology with Virtex FPGA is the target Hardware device. Experimental results prove that the Area occupied and power consumed by the proposed pulse generators are found to have Low area and low power consumption, respectively.


VLSI, Edge Combiner, Multi Phase Clock Generator, Automatic Test Equipment, FPGA.

How to Cite this Article?

Lokesh, P., Thrimurthulu, V., & Priya, L. M. (2019). Design of High Performance Pulse Generator to Perform Automatic Test in VLSI Circuits. i-manager's Journal on Electronics Engineering, 9(3), 26-31.


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