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i-manager's Journal on Electronics Engineering (JELE)

Current Issue Vol. 15 Issue 1

Most Cited

Volume 5 Issue 2 December - February 2015

Article

Overview of Polymer based MEMS sensors

T. Sripriya* , V. Jeyalakshmi**

* Research Scholar, Department of Electronics and Communication Engineering, Sathyabama University.

** Professor, Department of Electronics and Communication Engineering, College of Engineering, Chennai.

Sripriya, T. and Jeyalakshmi, V. (2015). Overview of Polymer based MEMS sensors. i-manager's Journal on Electronics Engineering, 5(2), 1-6. https://doi.org/10.26634/jele.5.2.3332

Abstract

The objective of this paper is to present an overview of polymer based sensors, and technologies used for their fabrication. In this paper, the design and fabrication of shear stress sensor, silicon based micro sensor, gas sensor, pressure sensor, polymer filled sensor and Quartz sensor are discussed. Sensors are used to detect and measure a physical property. They indicate the value being measured and are also capable of providing a proper response to any change in the measured physical value. Example of commonly used sensors include Pressure Sensor, Temperature Sensor, Gas Sensor, Humidity Sensor, etc., Microelectromechanical System based sensors are miniaturized in size and their sensing is more accurate and they have a long life.

References

[1]. Fan-Gang Tseng and Chun-Jun Lin, (2003). “Polymer MEMS-Based Fabry–Perot Shear Stress Sensor”, IEEE Sensor Journal, Vol. 3, No. 6, pp. 812-817.

[2]. Christoph Friese et al., (2003). “Polymer Based Membrane Mirrors for Micro Optical Sensor”, IEEE.

[3]. Carmen A.M.Fung Et Al., (2005). “A PMMA – Based Micro Pressure Sensor Chip Using Carbon Nanotubes as th Sensing Elements”, IEEE, 18 International Conference on Micro Electro-Mechanical System, pp. 251-254.

[4]. Carmen K.M.Fung Et Al., (2005). “Fabrication of CNTBased MEMS Piezoresistive Pressure Sensors using DEP Nanoassembly”, IEEE Conference on Nanotechnology, Vol. 1, pp. 199-202.

[5]. Volker Schulz Et Al., (2013). “A Closed-Loop Hydrogel- Based Chemical Sensor”, IEEE Sensors Journal, Vol. 13, No. 3, pp. 994-1002.

[6]. Stephan Trautweiler and Nicholas Mosier., “New Silicon-Based Metal-Oxide Chemical Sensors ”, Microchemical System Publication.

[7]. Hsan-Yin Hsu et al., (2010). “Thermo Sensitive Microgels as in situ sensor for Temperature Measurement in Optoelectronic Tweezers”, IEEE, Micro Electro- Mechanical System, pp. 1123-1126.

[8]. R.Buchner et al., (2006). “Miniaturized Thermal Flow Sensors for Rough Environments”, IEEE MEMS, pp.582-585.

[9]. Sang-Soo Je et al., (2011). “A Thin Film Piezoelectric PVDF-TrFE Based Implantable Pressure Sensor Using Lithographic Patterning”, IEEE MEMS, pp. 644-647.

[10]. Lily L.Li et al., (2014). “Noise Squeezing Controlled Parametric Bifurcation Tracking of MIP-Coated Microbeam MEMS Sensor for TNT Explosive Gas Sensing”, Journal of Microelectromechanical Systems, pp. 1228- 1236.

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Research Paper

An SDR Architecture for Linearizing RF Power Amplifier with DPD Technique

Asif Ahmed*

Lecturer, Electrical and Communication Engineering, American International University, Bangladesh

Ahmed, A. (2015). An SDR Architecture for Linearizing RF Power Amplifier with DPD Technique. i-manager's Journal on Electronics Engineering, 5(2), 7-14. https://doi.org/10.26634/jele.5.2.3333

Abstract

In wireless transmission systems, non-ideal response of different functional components along with non linearity of power amplifier plays a major role in degrading the transmitter performance. Several parameters define the performance of a wireless, such as Adjacent Channel Power Ratio (ACPR), Error Vector Magnitude (EVM), spectral mask, etc., and the effect of non-ideal behavior of the transmitter affects these parameters. In many standards, these parameter specifications are defined such that the concern for transmitter linearization is very much relaxed. Standards like Terrestrial Trunked Radio (TETRA) specify strict regulation on these parameters. Therefore, the requirement of linearity is a great challenge for the design of a transmitter, and among these the Digital Pre-distortion (DPD) technique is a wellknown concept. In this paper, an appropriate architecture of SDR is presented for successful operation of the DPD technique. Both signal processing and physical layer architecture may be utilized for complete implementation of the SDR system.

References

[1]. Bondar, D., Budimir, D. (2009). “Digital baseband predistortion of wideband power amplifiers with improved memory effects”. Proc. IEEE Radio and Wireless Symposium RWS'09, San Diego, USA. pp. 284-287. doi: 10.1109/RWS.2009.4957334..

[2]. Morgan, D.R., Zhengxiang Ma, Jaehyeong Kim, Zierdt, M.G., Pastalan, J. (2006). “A generalized memory polynomial model for digitalpredistortion of RF power amplifiers”. IEEE Trans. Signal Processing. Vol. 54, No. 10, pp. 3852-3860.doi: 10.1109/TSP.2006.879264.

[3]. Cavers, J.K. (1990). “Amplifier linearization using a digital predistorter with fast adaptation and low memory requirements”. IEEE Trans. Veh. Technol.. Vol. 39, No. 4, pp. 374-382. doi: 10.1109/25.61359..

[4]. Faulkner, M.; Johansson, M. (1994). “Adaptive linearization using predistortion-experimental results”. IEEE Trans. Veh. Technol. Vol. 43, No. 2, pp. 323–332. doi: 10.1109/25.293651.

[5]. Muhonen, K.J.; Kavehrad, Mohsen; Krishnamoorthy, R. (2000). “Lookup table techniques for adaptive digital predistortion: A development and comparison”. IEEE Trans. Veh. Technol. Vol. 49, No. 5, pp. 1995–2002. doi:10.1109/25.892601.

[6]. P. B. Kennington, (2000). “High-Linearity RF Amplifier Design”, ch. 2, pp. 60–63.Boston, London: Artech House.

[7]. L. Tee. (2007). “Transmitter Linearization for Portable Wireless Communication Systems”. PhD thesis. Electrical Engineering and Computer Sciences, UCB, Berkeley, California.

[8]. Tupynamba, R.C. and Camargo, E. (1992). MESFET nonlinearities applied to pre- distortion linearizer design. IEEE MTT-S Digest. pp. 955–958.doi: 10.1109/MWSYM. 188148.

[9]. N. Imai and T. M. T. Nojima, et al. (1992). “Novel linearizer using balanced circulators and its application to multilevel digital radio systems”. IEEE Transactions Microwave Theory and Techniques. Vol. 37. pp. 1237–1243.doi: 11.1109/22.31085.

[10]. Karam, G. and Sari, H. (1989). “Implementation and performance of data predistortion with memory in digital microwave radio”. Proceeding ofthe IEEE Global Telecommunications Conference (GLOBECOM). Vol. 1. pp. 400–405. doi: 10.1109/22.31085.

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Research Paper

Design and Simulation of RF-MEMS Integrated Reconfigurable Antenna for Wideband Applications

K Nalini* , V.R. Anitha**

* M. Tech Student, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.

** Professor, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.

Nalini, K. , and Anitha, V. R. (2015). Design and Simulation of RF-MEMS Integrated Reconfigurable Antenna for Wideband Applications. i-manager's Journal on Electronics Engineering, 5(2), 15-20. https://doi.org/10.26634/jele.5.2.3334

Abstract

Reconfigurability is the ability to adaptively change the characteristics in an antenna system. In this paper, Radio Frequency-Micro Electro Mechanical Switches (RF-MEMS) are integrated to provide a reconfigurable antenna system that radiates similar patterns over a wide range of frequencies. The different issues encountered during the integration of MEMS switches and the overall system design procedure will be described in this work. The final model will radiate at different frequencies with various radiation patterns. The proposed antenna can be used for the wide band applications in the range of DC to 40 GHz range with reconfigurability.

References

[1]. J.Gianvittorio, Y.Rahmat-Samii, Fractal Element Antennas: (2000). "A Compilation of configurations with Novel Characteristics" Antennas & Propagation for Wireless Comm. IEEE con, pp.129-32.

[2]. Rajdeep Singh, Amandeep Singh, Amandeep Singh Bhandari, (2014). "Efficient design of sierpinski Fractal Antenna for High Frequency Applications", International Journal of Engg Research & Applications, ISSN:2248- 9622, Vol.4, pp-44-48.

[3]. G.J.S.Chen, (2003). "Multi-frequency Characteristic of Annular ring slot antennas", Microw. Opt. Technol. Lett, Vol.38, No.6.

[4]. H.Mopidevi, D. Radrigo, O. Kaynar, L.Jofre and B.A. Centiner, (2011). "Compact and Broadband antenna for LTE and Public safety applications", IEEE Antennas Wireless Propag.Lett, Vol.10, pp.1224-1227.

[5]. B.A.Letiner, G.R.Crusats, L.Jofre and N.Biyikli, (2010). "RF-MEMS Integrated frequency reconfigurable annular slot antenna", IEEE Trans. Antennas Propagations, Vol.58, No.3.

[6]. Huseyin Altun, Erdal Korkmaz, and Bahattin Turetken, (2011). "Simulation of a Conformal Reconfigurable Fractal Tree Antenna with Adaptive Multi Beam and Frequency Characteristics", Progress in Electromagnetics Research Symposium Proceedings, Suzhou, China, pp. 12-16.

[7]. Hector J. De Los Santos, Scott Rassoulian, and John Maciel, (2005). "MEMS for Future Microwave Systems", IEEE Microwave Theory and Technique Society, pp 905-908.

[8]. Insu Yeom, Junghan Chol, Sung-su Kwoun, Byungje Lee, (2014). "Analysis of RF Front-End Performance of Reconfigurable Antennas with RF Switches in the Far Field", International Journal of Antennas and Propagation, Vol. 2014.

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Research Paper

Bridgeless PFC Implementation Using One CycleControl Technique

K. Prathibha* , M. Vasudeva Reddy **

* Assistant Professor, Department of Electrical and Electronics Engineering, SVCE, Tirupati.

** Associate Professor, Department of Electronics and Communication Engineering, YITS, Tirupati.

Prathibha, K., and Reddy, M.V. (2015). Bridgeless PFC Implementation Using One Cycle Control Technique. i-manager's Journal on Electronics Engineering, 5(2), 21-26. https://doi.org/10.26634/jele.5.2.3335

Abstract

To reduce the rectifier bridge conduction loss, different topologies have been developed. Among these topologies, the bridgeless boost does not require range switch and shows both simplicity and high performance. Without the input rectifier bridge, bridgeless PFC generates less conduction loss as compared to the conventional PFC. Although the circuit structure is simple, the location of the boost inductor on the AC side makes it difficult to sense the AC line voltage and inductor current. At the same time, since the AC side inductor structure makes the output floating regarding the input line, the circuit suffers from high common mode noise. Compared to the average current mode control, one cycle control shows many benefits such as no multiplier requirement, no input voltage sensing requirement, and no inductor current sensing requirement. Therefore, one cycle control gives an attractive solution for the bridgeless PFC circuit. In this paper, One Cycle Control technique is implemented in the bridgeless PFC. By using one cycle control both the voltage sensing and current sensing issues of the bridgeless PFC circuit can be solved. The experimental results show both efficiency improvement and good power factor correction function. At the same time EMI results show that the circuit noise is controllable.

References

[1]. A. F. Souza and I. Barbi (1999), “High power factor rectifier with reduced conduction and commutation losses,” in Proc. Int. Telecommunication Energy Conf., pp. 811–815.

[2]. C. M. Wang (2005), “A novel ZCS PWM power factor pre regulator with reduced conduction losses,” IEEE Trans. Ind. Electron., Vol. 52, No. 3, pp. 689–700.

[3]. C. M. Wang (2003), “A novel zero-voltage switching PWM boost rectifier with high power factor and low conduction losses,” in Proc. Int. Telecommunication Energy Conf., pp. 224–229.

[4]. D. Tollik and A. Pietkiewicz (1992), “Comparative analysis of 1-phase active power factor correction topologies,” in Proc. Int. Telecommunication Energy Conf., pp. 517–523.

[5]. H. Ye, Z. Yang, J. Dai, C. Yan, X. Xin, and J. Ying (2004), “Common mode noise modeling and analysis of dual boost PFC circuit,” in Proc. Int. Telecommunication Energy Conf., pp. 575–582.

[6]. J. Liu, W. Chen, J. Zhang, D. Xu, and F. C. Lee (2001), “Evaluation of power losses in different CCM mode singlephase boost PFC converters via simulation tool,” in Rec. IEEE Industry Applications Conf., pp. 2455–2459.

[7]. P. Kong, S. Wang, and F. C. Lee (2006), “Common mode EMI noise suppression in bridgeless boost PFC converter,” in Proc. CPES Power Electronics Conf., pp. 65–70.

[8]. P. N. Enjeti and R. Martinez (1993), “A high performance single phase AC to DC rectifier with input power factor correction,” in Proc. IEEE Applied Power Electronics Conf., pp. 190–195.

[9]. T. Ernö and M. Frisch (2004), “Second generation of PFC solutions,” in Proc. Power Electronics Europe, No. 7, pp. 33–35.

[10]. U. Moriconi, (2002), “A bridgeless PFC configuration based on L4981 PFC controller, ”Application Note AN 1606, STMicroelectronics, pp 1-18.

[11]. W.Y. Choi, J.M. Kwon, E.H. Kim, J.J. Lee, and B.H. Kwon (2007), “Bridgeless boost rectifier with low conduction losses and reduced diode reverse-recovery problems,” IEEE Trans. Ind. Electron., Vol. 54, No. 2, pp. 769–780.

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Research Paper

VLSI Modeling Of FM0/Manchester Encoder Using EDML Technique For DSRC Application Systems

P. Lokesh* , V. Thrimurthulu, L. Mihira Priya*

* PG Scholar, Department of ECE, Chadalawada Ramanamma Engineering College, Tirupati (A.P), India.

Professor, Department of ECE, Chadalawada Ramanamma Engineering College, Tirupathi (A.P), India.

* Associate Professor, Department of Elelectronics, St Joseph Degree & PG College, Kingkoti, Hyderabad, India.

Lokesh, P., Thrimurthulu, V., and Priya, L.M. (2015). VLSI Modeling Of FM0/Manchester Encoder Using EDML Technique For DSRC Application Systems. i-manager's Journal on Electronics Engineering, 5(2), 27-33. https://doi.org/10.26634/jele.5.2.3336

Abstract

The aim of this paper is to promote intelligent road and vehicle safety systems in order to control the accident rates and vehicle damages by using Dedicated Short Range Communication (DSRC). The DSRC is of two types: automobile-toautomobile and automobile-to-roadside. In automobile-to-automobile, the DSRC has the ability of message sending and broadcasting among automobiles for safety issues and public information announcement. In this paper, the authors propose a complete simulation model of Dual Mode Logic, (DML) Technique. This method increases the hardware utilization rate from 57.14% to 100% for both FM0 and Manchester encodings being used for the Dedicated Short- Range Communication (DSRC) which is a budding technique to drive the smart transportation system into our daily life with low power digital system designs. The maximum operating frequency is 7GHz and 4GHz for Manchester and FM0 encoding. The on board power consumption is 1133 mW at 3.352 V for Manchester encoding and 1106 mW at 3.352 V for FM0 encoding. The presentation of this paper is evaluates 32nm CMOS technology by utilizing the design simulation Xilinx Vivado tools and layout simulation with extended DML Techniques using Microwind simulator. This paper not only provides a fully reused architecture but also exhibits high performance.

References

[1]. Yu-Hsuan Lee, “VLSI Architecture of FM0/Manchester Encoding Using SOLS Technique for DSRC Applications”, IEEE, and Cheng-Wei Pan.

[2]. J. B. Kenney, (2011). “Dedicated short-range communications (DSRC) standards in the United States,” Proc. IEEE, Vol. 99, No. 7, pp. 1162–1182.

[3]. J. Daniel, V. Taliwal, A. Meier, W. Holfelder, and R. Herrtwich, (2006). “Design of 5.9 GHz DSRC-based vehicular safety communication,” IEEE Wireless Commun. Mag., Vol. 13, No. 5, pp. 36–43.

[4]. P. Benabes, A. Gauthier, and J. Oksman, (2003). “A Manchester code generator running at 1 GHz,” in Proc. IEEE, Int. Conf. Electron., Circuits Syst., Vol. 3, pp. 1156–1159.

[5]. A. Karagounis, A. Polyzos, B. Kotsos, and N. Assimakis, (2009). “A 90nm Manchester code generator with CMOS th switches running at 2.4 GHz and 5 GHz,” in Proc. 16 Int. Conf. Syst., Signals Image Process., pp. 1–4.

[6]. Y.-C. Hung, M.-M. Kuo, C.-K. Tung, and S.-H. Shieh, (2009). “High-speed CMOS chip design for Manchester and Miller encoder,” in Proc. Intell. Inf. Hiding Multimedia Signal Process., pp. 538–541.

[7]. M. A. Khan, M. Sharma, and P. R. Brahmanandha, (2008). “FSM based Manchester encoder for UHFRFID tag emulator,” in Proc. Int. Conf. Comput., Commun. Netw., pp. 1–6.

[8]. M. A. Khan, M. Sharma, and P. R. Brahmanandha, (2009). “FSM based FM0 and Miller encoder for UHF RFID tag emulator,” in Proc. IEEE Adv. Comput. Conf., pp. 1317–1322

[9]. J.-H. Deng, F.-C. Hsiao, and Y.-H. Lin, (2013). “Top down design of joint MODEM and CODEC detection schemes for DSRC coded-FSK systemsover high mobility fading channels,” in Proc. Adv. Commun. Technol., pp. 98–103.

[1]. Yu-Hsuan Lee, “VLSI Architecture of FM0/Manchester Encoding Using SOLS Technique for DSRC Applications”, IEEE, and Cheng-Wei Pan.

[2]. J. B. Kenney, (2011). “Dedicated short-range communications (DSRC) standards in the United States,” Proc. IEEE, Vol. 99, No. 7, pp. 1162–1182.

[4]. P. Benabes, A. Gauthier, and J. Oksman, (2003). “A Manchester code generator running at 1 GHz,” in Proc. IEEE, Int. Conf. Electron., Circuits Syst., Vol. 3, pp. 1156–1159.

[7]. M. A. Khan, M. Sharma, and P. R. Brahmanandha, (2008). “FSM based Manchester encoder for UHFRFID tag emulator,” in Proc. Int. Conf. Comput., Commun. Netw., pp. 1–6.

[8]. M. A. Khan, M. Sharma, and P. R. Brahmanandha, (2009). “FSM based FM0 and Miller encoder for UHF RFID tag emulator,” in Proc. IEEE Adv. Comput. Conf., pp. 1317–1322

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Research Paper

Memory Implementation using Multi Bit Flip-Flop

Palagani Yellappa* , Mareddi Bharathkumar, Shaik Shabana Azmi*

* , M.Tech Student, VLSI, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupathi

* Assistant Professor, VLSI, Department of Electronics and Communication Engineering, Annamacharya Institute of Technology & Sciences, Tirupathi..

Yellappa, P., Bharathkumar, M., and Azmi, S.S. (2015). Memory Implementation using Multi Bit Flip-Flop. i-manager's Journal on Electronics Engineering, 5(2), 34-39. https://doi.org/10.26634/jele.5.2.3337

Abstract

In the digital world memory elements play a vital role. In memory devices the most important factors are Area, Power and Speed. Increased Area and Power consumption of the memory device means reduced device reliability and lifetime. Flip-flops are the basic sequential components used for memory applications. D Flip-flop is one of the most commonly used Flip-flops and delay consumed by clocking is a major part of the whole design. In this paper, the authors analyze the design of Single-Bit Flip-Flop (SBFF i.e. 1-bit) and make a performance comparison over the Multi-Bit Flip-Flop (MBFF i.e. 2-bit, 4-bit, 8-bit, 16-bit and 32-bit). In this paper, the authors design SRAM and DRAM using both SBFF and MBFF in Xilinx Virtex-5 family (XC5VLX50). Designing the memory by using SBFF implies more power consumption. To get the maximum reduction in power and delay an algorithm has been proposed in which SBFFs are replaced with maximum possible MBFF without affecting the performance of the original circuit. These result in favor of Multi-Bit Flip-Flop as reduction of delay such as gate delay and net delay.

References

[1]. G.Prakash, K.Sathishkumar, S.Saravanan, (2013). “Achieveing reduced area by multi-bit Flip Flop design” International Conference on Computer Communication and informatics.

[2]. LI Xia Yu, JIA Song, LIU LiMin, (2012). “Design of Novel, Semi- transparent Flip-flops for high speed and low power application”, Science China Information Sciences, Vol. 55.

[3]. K. Siva Prasad, G. Rajesh, V. Thrimurthulu, (2014). "Implemenation of MBFF power reduction in CMOS technologies" IJIRCCE, Vol. 2, Special Issue 4.

[4]. B. SAIBABU, K. SUDHA RANI (2014). "Design and Analysis on Single-Bit to Multi-Bit Flip Flop" IJSETR, Vol. 03,Issue. 24.

[5]. Challa Sankaramma, K. D. Mohana Sundharam, (2014). “Optimization of area through multi bit Flip-flop th design using FPGA” IRF International Conference, 14 December, Chennai, India.

[6]. K. Sarada mani, R. P. Rubajini (2014). "Application of Multibit Flip-Flops by Using Carry Look Ahead Adder" IJETAE Vol 4, No 1.

[7]. M.Ananthi, C.Sathish Kumar (2015). "QDR SRAM Design Using Multi - bit Flip-Flop" IJARECE, Vol 4, No 3

[8]. Joonsung yang/ Gahngsoo Moon, (2005). “32k-bit sleepy SRAM”, in Benton H. Calhoun, Frank A. Honore, Anantha P. Chandrakasan- (2004). “A Leakage reduction methodology for distributed MTCMOS”. IEEE Journal of Solid state circuits, Vol. 39, No.5.

[9]. K. Ravi Teja Kumar, K. Ramesh (2015). "Implementation of SRAM array by using MBFF" IJRCAR Vol.3 No. 4.

[10]. Charles Kime & Thomas Kaminski, (2008). “Logic and Computer Design Fundamentals” Pearson Education, Inc.

i-manager's Journal on Electronics Engineering (JELE)

Current Issue Vol. 15 Issue 1

Most Read

Most Cited

Volume 5 Issue 2 December - February 2015

Overview of Polymer based MEMS sensors

T. Sripriya* , V. Jeyalakshmi**

* Research Scholar, Department of Electronics and Communication Engineering, Sathyabama University. ** Professor, Department of Electronics and Communication Engineering, College of Engineering, Chennai.

Sripriya, T. and Jeyalakshmi, V. (2015). Overview of Polymer based MEMS sensors. i-manager's Journal on Electronics Engineering, 5(2), 1-6. https://doi.org/10.26634/jele.5.2.3332

Abstract

References

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An SDR Architecture for Linearizing RF Power Amplifier with DPD Technique

Asif Ahmed*

Lecturer, Electrical and Communication Engineering, American International University, Bangladesh

Ahmed, A. (2015). An SDR Architecture for Linearizing RF Power Amplifier with DPD Technique. i-manager's Journal on Electronics Engineering, 5(2), 7-14. https://doi.org/10.26634/jele.5.2.3333

Abstract

References

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Design and Simulation of RF-MEMS Integrated Reconfigurable Antenna for Wideband Applications

K Nalini* , V.R. Anitha**

* M. Tech Student, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India. ** Professor, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.

Nalini, K. , and Anitha, V. R. (2015). Design and Simulation of RF-MEMS Integrated Reconfigurable Antenna for Wideband Applications. i-manager's Journal on Electronics Engineering, 5(2), 15-20. https://doi.org/10.26634/jele.5.2.3334

Abstract

References

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Bridgeless PFC Implementation Using One CycleControl Technique

K. Prathibha* , M. Vasudeva Reddy **

* Assistant Professor, Department of Electrical and Electronics Engineering, SVCE, Tirupati. ** Associate Professor, Department of Electronics and Communication Engineering, YITS, Tirupati.

Prathibha, K., and Reddy, M.V. (2015). Bridgeless PFC Implementation Using One Cycle Control Technique. i-manager's Journal on Electronics Engineering, 5(2), 21-26. https://doi.org/10.26634/jele.5.2.3335

Abstract

References

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VLSI Modeling Of FM0/Manchester Encoder Using EDML Technique For DSRC Application Systems

P. Lokesh* , V. Thrimurthulu**, L. Mihira Priya***

Lokesh, P., Thrimurthulu, V., and Priya, L.M. (2015). VLSI Modeling Of FM0/Manchester Encoder Using EDML Technique For DSRC Application Systems. i-manager's Journal on Electronics Engineering, 5(2), 27-33. https://doi.org/10.26634/jele.5.2.3336

Abstract

References

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Memory Implementation using Multi Bit Flip-Flop

Palagani Yellappa* , Mareddi Bharathkumar**, Shaik Shabana Azmi***

* ,** M.Tech Student, VLSI, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupathi *** Assistant Professor, VLSI, Department of Electronics and Communication Engineering, Annamacharya Institute of Technology & Sciences, Tirupathi..

Yellappa, P., Bharathkumar, M., and Azmi, S.S. (2015). Memory Implementation using Multi Bit Flip-Flop. i-manager's Journal on Electronics Engineering, 5(2), 34-39. https://doi.org/10.26634/jele.5.2.3337

Abstract

References

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* Research Scholar, Department of Electronics and Communication Engineering, Sathyabama University.

** Professor, Department of Electronics and Communication Engineering, College of Engineering, Chennai.

* M. Tech Student, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.

** Professor, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.

* Assistant Professor, Department of Electrical and Electronics Engineering, SVCE, Tirupati.

** Associate Professor, Department of Electronics and Communication Engineering, YITS, Tirupati.

P. Lokesh* , V. Thrimurthulu, L. Mihira Priya*

Palagani Yellappa* , Mareddi Bharathkumar, Shaik Shabana Azmi*

* , M.Tech Student, VLSI, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupathi

* Assistant Professor, VLSI, Department of Electronics and Communication Engineering, Annamacharya Institute of Technology & Sciences, Tirupathi..