i-manager's Journal on Electronics Engineering (JELE)


Volume 12 Issue 2 December - February 2022

Research Paper

Development of High Data Rate Optical Transmitter in C-Band using External Modulation Technique

Vikas Agrawal* , P. K. Pandey**, R. K. Bahl***
*-*** Space Applications Centre, Indian Space Research Organization, Ahmedabad, India.
Agrawal, V., Pandey, P. K., and Bahl, R. K. (2022). Development of High Data Rate Optical Transmitter in C-Band using External Modulation Technique. i-manager's Journal on Electronics Engineering, 12(2), 1-8. https://doi.org/10.26634/jele.12.2.18517

Abstract

This paper presents the development and characterization of high-speed ON-OFF Keying (OOK) Optical Transmitter up to 12 Gbps using External Modulation Technique that comprises Continuous Wave (CW) laser, Mach-Zehnder Modulator (MZM), and ultra-high bandwidth driver amplifier for MZM. The CW laser driver and high bandwidth modulator driver amplifier has been designed and integrated with the modulator which is biased for OOK modulation scheme. This work includes Direct Current (DC), Optical and Radio Frequency (RF) characterization of MZM modulator; selection of suitable bias point for modulator to achieve OOK modulation format, design and development of wideband driver amplifier in microstrip configuration on 25-mil alumina using Hittite device. The biasing circuit for distributed feedback laser is designed as an unmodulated CW optical signal to feed optical modulator. In this work, the assembly and characterization of optical transmitter is also carried out and performance is analyzed in terms of different parameters such as Extinction ratio and Signal-to-Noise Ratio (SNR) etc.

Research Paper

Humidity Monitoring of Neonatal Intensive Care Unit Based on Programmable System on Chip

N. N. Kumbhar* , S. A. Tingare**, S. S. Dalvi***, S. K. Tilekar****, P. V. Mane-Deshmukh*****
*,*** Department of Electronics, Mudhoji College, Phaltan, Maharashtra, India.
** Shankarrao Mohite Mahavidyalaya, Akluj, Maharashtra, India.
**** Department of Electronics, Shankarrao Mohite Mahavidyalaya, Akluj, Maharashtra, India.
***** Department of Electronics, Jayawantrao Sawant College of Commerce and Science, Hadapsar, Maharashtra, India.
Kumbhar, N. N., Tingare, S. A., Dalvi, S. S., Tilekar, S. K., and Mane-Deshmukh, P. V. (2022). Humidity Monitoring of Neonatal Intensive Care Unit Based on Programmable System on Chip. i-manager's Journal on Electronics Engineering, 12(2), 9-15. https://doi.org/10.26634/jele.12.2.18650

Abstract

A premature baby's treatment takes place in the Neonatal Intensive Care Unit (NICU). The NICU is an isolated room and it consists of a number of baby incubators and measuring, monitoring devices such as incubator, overhead heater, monitors, ambient oxygen analyser, intravenous drip, feeding pump and tubes, power supply, ventilator monitor, ventilator, etc. The measuring and controlling parameters are temperature of baby and baby incubator, oxygen level, CO2 level, pulse rates, humidity, light intensity etc. This research paper deals with monitoring the humidity of baby incubators. The increase or decrease of humidity levels causes an effect on the baby's health. High humidity creates problems such as heat exhaustion, heat stroke and an overproduction of mold causes allergies. The monitoring and controlling of humidity are the most important parameters in NICU. The humidity of the baby incubator is monitored using a humidity sensor. The sensing data is given to the Programmable System on Chip (PSoC). The system under investigation is designed successfully and reported in this paper.

Research Paper

Design and Analysis of Multiband Composite Antenna with Dual – Sense Circular Polarization Characteristics

M. Sujatha* , T. Lavanya**, P. Moulyanjani***, R. Narayana Rao****, V. Srivani*****
*-***** Department of Electronics and Communication Engineering, Lendi Institute of Engineering & Technology, Vizianagaram, Andhra Pradesh, India.
Sujatha, M., Lavanya, T., Moulyanjani, P., Rao, R. N., and Srivani, V. (2022). Design and Analysis of Multiband Composite Antenna with Dual – Sense Circular Polarization Characteristics. i-manager's Journal on Electronics Engineering, 12(2), 16-22. https://doi.org/10.26634/jele.12.2.18582

Abstract

In the current era of wireless communication, the antenna researchers are widely focused on two major areas such as bandwidth enhancement and generation circular polarization characteristics. Bandwidth enhancement provides higher data rate without any increment in power level. In the same way, orientation independency between transmitter and receiver antennas can be provided by circular polarization characteristic. In this project, a dual-sense Circularly Polarized (CP) hybrid antenna is reported. The antenna that is proposed works over the range of frequency 3.28 GHz to 5.78 GHz with a fractional bandwidth of 55.18%. Dual Circular Polarization wave with dual-sense characteristics for which Axial Ratio is less than 3 dB are created in the range of frequency 3.81 to 4.28 GHz and 4.98 to 5.28 GHz respectively. Based on the above parameters the antenna has applications like WLAN and WIMAX.

Research Paper

An Optimized Design Approach for 8-Bit Pipelined ADC using High Gain Amplifier

Kakarla Deepti*
Hybrid Neural Network Architectures, India.
Deepti, K. (2022). An Optimized Design Approach for 8-Bit Pipelined ADC using High Gain Amplifier. i-manager's Journal on Electronics Engineering, 12(2), 23-29. https://doi.org/10.26634/jele.12.2.18529

Abstract

Demand of high-performance converters with integrated circuits with combined features and specifications of power consumption, resolution and speed have become very dominant in many emerging applications. Pipelined ADC mixed signal system consists of Sample and Hold, Flash ADC, DAC and Gain amplifier in all the stages. In the present work, a pipeline ADC architecture has 3-stages, with each stage of 3-bits with 3-bit flash ADC followed by a 3-bit binary weighted DAC at each stage. A novel approach to design a 8-bit ADC is implemented, and this design offers less number of comparators compared to flash ADC with less circuit complexity, and 8-bit ADC is designed with improvement in resolution. It is simulated first in MATLAB, but applying 1.8Volts sinusoidal and sampling time of 40 MSPS and clock frequency 10MHz the individual blocks are implemented in LT-spice 180 nm technology with bandwidth of 40 MHz. Then a high gain amplifier is implemented by using Diode connected load differential amplifier with 10mv input voltage and 18Mhz input frequency.

Research Paper

Analysis of a CS Amplifier Based on CNTFET with Parasitic Elements of Interconnection Lines

Roberto Marani* , Anna Gina Perri**
* Institute of Intelligent Industrial Technologies and Systems for Advanced Manufacturing (STIIMA), National Research Council of Italy.
** Department of Electrical and Information Engineering, Polytechnic University of Bari, Bari, Italy.
Marani, R., and Perri, A. G. (2022). Analysis of a CS Amplifier Based on CNTFET with Parasitic Elements of Interconnection Lines. i-manager's Journal on Electronics Engineering, 12(2), 30-36. https://doi.org/10.26634/jele.12.2.18527

Abstract

In this paper we present a procedure to study the effects of parasitic elements (capacitances, inductances and resistances) of interconnection lines in integrated circuits where Carbon Nanotubes are embedded. In particular the Drain/Source pads dimensions of CNT are analysed, as well as the interconnection lines between a CNT and an appropriate load are sized. In order to estimate parasitic elements in CNTs embedded integrated circuits, we analyse 50 nm technology. Moreover it is also possible for predictions analysis on 10 nm and 3 nm technology. We apply the proposed procedure to the design of a Common-Source amplifier, using a CNTFET model already proposed by us. The frequency domain simulations, obtained using the ADS simulator, show how the parasitic elements limit the performances of CNTs. In particular we obtain that the -3 dB cutting frequency of the examined amplifier full of parasitic elements increases as technology decreases. Moreover we repeat the proposed simulations using SPICE, obtaining results practically coincident but with the Verilog-A implementation we have mainly a simulation run time much shorter and a software much more concise and clear than schemes using ABM blocks in SPICE.