Abstract

A simple tunable grounded voltage controlled floating gate metal oxide semiconductor field effect transistor based resistor is proposed in this paper. Highly linear resistance is obtained by cancelling the non-linear term present in the drain current of Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with the help of Floating Gate Metal Oxide Semiconductor Field Effect Transistors (FGMOSFETs). The attenuation function is performed by two FGMOSFETs and this signal is fed to the gate terminal of N- channel Metal Oxide Semiconductor Field Effect Transistor (NMOSFET). The input current is applied on the drain terminal of the N- channel Metal Oxide Semiconductor Field Effect Transistor. The drain current equation of the metal Oxide Semiconductor Field Effect Transistor is utilized to achieve the equivalent linear resistance. The features exhibited by a resistor are simplicity, smaller area, broad range of programmability, and wider bandwidth. The range of the resistance observed is from 3.6 kΩ to 10.58 kΩ for the varied control voltage from 1.5 V to 2.4 V. The frequency response of the proposed resistor measured is 288 MHz. The total power dissipation obtained is 22.5 μW. The circuit is verified by simulation after applying macro model of the FGMOSFET. The circuit is simulated using SPICE on 0.13 μm Complementary Metal Oxide Semiconductor (CMOS) technology to demonstrate the efficacy of the proposed circuits. The presented circuit is beneficial for analog signal processing applications that functions in low power.

Abstract

Nowadays, Atomization is the need of an industrial sector for processing various sections of a typical industry. On survey it is observed that Atomization may help to increase the reliability, quality, security and reduce cost. The Wireless Sensor Actuator Network (WSAN) is the challenging technology in the field of Industrial sectors, has been proposed in this paper to monitor, detect, and control the leakage of gases. The present research work is carried out to detect and control the hazardous gas in industrial transportation system to avoid the catastrophic accidents as well as reduce effect on environment. For this purpose, Sensor Actuator Node (SA-Node) is wired about PIC 18F4550 microcontroller along with sensing and signal conditioning capabilities. The IEEE 802.15.4 standard is deployed for wireless communication. On the other hand, the control action is carried out through Coordinator SA-Node, which is capable for the electromechanical action. To synchronize the on-chip as well as off-chip peripherals, the firmware is developed realizing the concept of real time operating system. It is observed that the system works satisfactorily with great accuracy.

Abstract

A novel Diode Free Adiabatic Logic (DFAL) based Threshold Inverter Quantizer (TIQ) is suggested in this work for implementing a 3-bit Flash type Analog to Digital Converter (FADC). For appropriate implementation of such TIQ, there is a necessity of rehabilitated reference voltage for each of the comparator and this task is accomplished methodically by sizing the transistors of the TIQ comparators. The suggested work is carried out with TSMC 65 nm Technology on Cadence- Virtuoso-IC616 version. The average power dissipation by the proposed FADC simulated at 1.2 V and for 1fF capacitive load is 5.5 μW, which is 66 % less than that of the power consumed by CMOS-TIQ based FADC at 100 Hz.

Abstract

A low cost highly sensitive organic thin film transistor based organic gas sensor has been investigated with pentacene as an active and sensing layer. The variation in work function of source is lured due to gas adsorption, minimised carrier mobility, and soaring source and also drain resistance has paved way for a change in minimum and maximum drain current. On varying the width of active layer along with dielectric, significant variation was observed in turn on current, and minimum and maximum drain current over a constant threshold voltage on different source to drain width architecture. Consequently, sensitivity was formulated along with average sensitivity. The organic thin film transistor planted devices have emerged to be superior class of sensors.

Abstract

Due to declining technologies and increasing design extent, it is becoming high-priced and troublesome to allocate a global clock signal all through the chip. To overcome this, asynchronous processor design is considered as they do not have global clock. In contrary processor industry makes over a change from synchronous to asynchronous logic. Power and robustness differ notably from synchronous to asynchronous circuits. Synchronous blocks which are communicated by asynchronous links in SoC design is a challenging task. Hence, Globally Asynchronous Locally Synchronous (GALS) system is an appropriate technique, as they merge the advantages of both the Synchronous and Asynchronous approaches. International Technology Roadmap for Semiconductors (ITRS) have detailed that the usage of asynchronous logic doubles by 2024. Asynchronous logic resolves the difficulties that occur in synchronization. Fully Synchronous and GALS are two design approaches to detect a signal in the module of the signal processing system. The primary objective is to demonstrate a low power implementation of GALS system.

The system reduces the large Electro Magnetic Interface (EMI) when an active clock is generating large spikes at the supply current in the synchronous circuit. In order to avoid failures of the synchronous circuits, asynchronous wrappers are used for communication in between the synchronous blocks, where the stability of such systems are to be verified. By using asynchronous wrapper in a synchronous island, one can meet the full design requirements and a single die requires large number of clock frequencies because various IP cores are integrated on a complex systems. An efficient technique to design these kind of distributed SoC is GALS. Some clocking schemes are used here to investigate a number of independent clocks on synchronous domains and to obtain reliable transfer of data and low latency. The efficient systems with hardware complexity, global clock rate reduction, and low power consumption use this kind of technique.

Abstract

Microstrip antennas are the ones that fulfill most of the wireless system requirements. These antennas are widely used on base stations as well as handsets. The microstrip patch antennas have increasingly wide range of applications in the wireless communication system due to their great advantages. Planar Inverted L Patch (PILP) Antenna is a good candidate for achieving compact microstrip antennas. In addition to compact operation, this design is also suitable for dual-frequency operation. To satisfy the needs of certain wireless communication systems, it is required to design and develop the antenna arrays to obtain the increase in gain and enhancement in the bandwidth. The 2x1 element arrays of microstrip line fed shorted patch antennas are developed. The experimental study shows that the arrays offer considerable increase in gain and enhancement in the bandwidth.

Abstract

The analysis of Multiband Microstrip Antenna (MSA) using Neural Network (NN) through Radial Basis Function (RBF) has been descibed in this paper. Two parallel slots have been inserted on the patch of MSA. The estimation of bandwidth with the variation of these slots has been trained and tested using ANN. The antenna resonates at frequencies 2.465 GHz, 3.455 GHz, and 5.17 GHz with obtained fractional bandwidth of 5.601 MHz, 8.09 MHz, and 16.80 MHz, respectively. The geometry of antenna is then simulated using HFSS simulation software. The results are measured and tested using vector network analyzer. The frequency bands meet the design specification of covering the WLAN and WiMAX application at C-band.

Abstract

Reversible logic is one of the emerging research areas having its application in the fields of Quantum computing, Optical computing, DNA computing, Nanotechnology, Cryptography, Bioinformatics etc. Reversible Logic has attained importance in the recent developments of high speed and low power digital systems. This has led to present data relating to the different reversible logic gates which are available in the literature. The Verilog Hardware Description Language (HDL) is used to code the reversible gates. The simulation and synthesis are carried out in Xilinx 14.3 Integrated Synthesis Environment (ISE).