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i-manager's Journal on Electronics Engineering (JELE)

Current Issue Vol. 15 Issue 1

Most Cited

Volume 6 Issue 1 September - November 2015

Research Paper

Trichotomous Bayes Factor Analysis [Tri–BFA]: A Post HocProbability Confirmatory Data Analysis Assurance ModelDesigned to Determine the Validity, Viability, andVerifiability of E–Learning Hypotheses

James Edward Osler II*

Faculty member, Department of Curriculum and Instruction, North Carolina Central University (NCCU) School of Education, USA.

Osler, J. E., II. (2015). Trichotomous Bayes Factor Analysis [Tri–BFA]: A Post Hoc Probability Confirmatory Data Analysis Assurance Model Designed to Determine the Validity, Viability, and Verifiability of E–Learning Hypotheses. i-manager's Journal on Electronics Engineering, 6(1), 1-12. https://doi.org/10.26634/jele.6.1.3680

Abstract

This paper presents meticulous knowledge about ‘Tri–Factor Analysis: A Model and Statistical Test of Performance, Efficacy, and Content for Electronics and Digital Learning Ecosystems’. This narrative provides an epistemological rational for the use of Bayesian probability statistical testing models for E–Learning via the Tri–Squared Test and subsequent TRINOVA Post Hoc test methodology. TRINOVA is an in–depth [Trichotomous Nomographical Variance] statistical procedure for the internal testing of the transformative process of qualitative data into quantitative outcomes through the Tri–Squared Test. Tri–Bayes Factor Analysis (or “Tri–BFA”) is an advanced statistical measure that is designed to check the validity and reliability of a Tri–Squared Test hypothesis using Bayesian probability. This is a novel approach to advanced statistical post hoc Tri–Squared hypothesis testing. It adds merit and considerable value to the mixed methods approach of research design that involves the holistic combination and comparison of qualitative and quantitative data outcomes. A sequential series of steps using the Tri–Squared Test, TRINOVA, and Tri–BFA mathematical models are provided to illustrate the entire process of advanced statistical Trichotomous inquiry.

References

[1] Babbie, E., (2016). The practice of social research, 14 ed. Cengage Learning.

[2]. Cohen, J. (1988). “Statistical power analysis: A computer program”, Routledge.

[3]. Cohen, J. (1992). “A power primer”. Psychological bulletin, Vol.112 , No.1, pp.155.

[4]. Jarosz, A. F., and Wiley, J. (2014). “What are the odds? A practical guide to computing and reporting Bayes Factors”, The Journal of Problem Solving, Vol. 7, No.1, pp. 2.

[5]. Lofland, J., Snow, D., Anderson, L., and Lofland, L. H. (2006). “Analyzing Social Settings: A Guide to Qualitative th Observation and Analysis”, 4 ed. Belmont, CA: Wadsworth.

[6]. Masson, M. E. (2011). “A tutorial on a practical Bayesian alternative to null-hypothesis significance testing”, Behavior Research Methods, Vol.43, No.3, pp.679-690.

[7]. Osler, J. E., (2012a). “Trichotomy–Squared – A novel mixed methods test and research procedure designed to analyze, transform, and compare qualitative and quantitative data for education scientists who are administrators, practitioners, teachers, and technologists”, i-manager’s Journal on Mathematics, Vol.1, No.3, pp. 23–31.

[8]. Osler, J. E. and Waden, C., (2012b). “Using innovative technical solutions as an intervention for at risk students: A meta–cognitive statistical analysis to determine the impact of ninth grade freshman academies, centers, and center models upon minority student retention and achievement”, i-manager’s Journal on School Educational Technology, Vol.7, No.3, pp. 11–23.

[9]. Osler, J. E., (2014a). “Triostatistics: The Application of Innovative In–Depth Advanced Post Hoc Statistical Metrics for the Assessment and Analysis of Statistically Significant Tri–Squared Test Outcomes”, Kentucky Journal of Excellence in College Teaching and Learning, Vol.12, No.3, pp. 27–39.

[10]. Osler, J. E., (2014b). “Introducing TRINOVA: “Trichotomous Nomographical Variance” A Post Hoc Advanced Statistical Test of Between and Within Group Variances of Trichotomous Categorical and Outcome Variables of a Significant Tri–Squared Test”, i-manager's Journal on Mathematics, Vol. 3, No. 4, pp. 1–14.

[11]. Osler, J. E., (2015). “Trichotomous Exploratory Data Analysis [Tri–EDA]: A Post Hoc Visual Statistical Cumulative Data Analysis Instrument Designed to Present the Outcomes of Trichotomous Investigative Models”. imanager's Journal on Instrumentation and Control Engineering,Vol. 3 (3), pp. 11–20.

[12]. Rosenberg, M. (1968). The Logic of Survey Analysis, New York: Basic Books.

[13]. Sheffrin, S. M., (2003). Economics: Principles in action, Upper Saddle River, New Jersey, Vol. 7, pp. 458- 551.

[14]. Sullivan, A., (2003). “Economics: Principles in action”.

[15]. Sullivan, A., and Sheffrin, S. M. (2003). Economics: Principles in Action. Upper Saddle River, NJ: Pearson Prentice Hall. pp. 157.

[16]. Wagenmakers, E. J., (2007). “A practical solution to the pervasive problems of p values”. Psychonomic bulletin & review, Vol.14, No.5, pp. 779-804.

[17]. Wan, N. (2015). “True Brain: Neuroscience etc”, Retrieved from: http://truebra.in/?page_id=29.

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Research Paper

Aging Aware Radix-4 Booth Multiplier WithAdaptive Hold Logic and Razor Flip Flop

SUVARNA* , K.Rajesh, S.Veerakumar*

* PG Scholar, Department of Electronics and Communication Engineering, Knowledge Institute of Technology, Salem, India.

_* Assistant Professor, Department of Electronics and Communication Engineering, Knowledge Institute of Technology, Salem, India.

Suvarna, S., Rajesh, K. and Veerakumar, S. (2015). Aging Aware Radix-4 Booth Multiplier With Adaptive Hold Logic and Razor Flip Flop. i-manager's Journal on Electronics Engineering, 6(1), 13-20. https://doi.org/10.26634/jele.6.1.3681

Abstract

Digital multipliers are most efficiently used in many applications such as Fourier Transform, Discrete Cosine Transforms, and Digital Filtering for high speed and low power consumption. The throughput of the multipliers is based on speed of the multiplier, and if it is too slow then, the entire performance of the circuit will be diminished. The pMOS transistor in negative bias cause Negative Bias Temperature Instability (NBTI), which increases the threshold voltage of the transistor and reduces the multiplier speed. Similarly, the nMOS transistor in positive bias cause Positive Bias Temperature Instability (PBTI). These effects reduce the transistor speed and the system may fail due to timing violations. So here, a new multiplier was designed with novel Adaptive Hold Logic (AHL) using Radix-4 Modified Booth Multiplier. By using Radix-4 Modified Booth Encoding (MBE), it is possible to reduce the number of partial products by half. Modified booth multiplier helps to provide higher throughput with low power consumption. This can adjust the AHL circuit to reduce the performance degradation. The expected result will reduce threshold voltage, increase throughput and speed and also reduce power. This modified multiplier design is coded by Verilog and simulated using Xilinx ISE 12.1 and implemented in Spartan 3E FPGA kit.

References

[1]. A. Calimera, E. Macii, and M. Poncino, (2012). “Design techniqures for NBTItolerant power-gating architecture, ”IEEE Trans. Circuits Syst., Exp. Briefs, Vol. 59, No. 4, pp. 249–253.

[2]. Cui, x., Liu, W. Chen, X. Swartzlander, E. Lombardi, F., (2015). “A Modified Partial Product Generator for Redundant Binary Multipliers,” in Computers, IEEE Transactions on ,Vol. PP, No.99, pp.11

[3]. IChyn Wey, ChienChangPeng, and FengYu Liao, (2015). "Reliable Low Power Multiplier Design Using Fixed Width Replica Redundancy Block," in Very Large Scale Integration (VLSI) Systems, IEEE Transactionson, Vol.23, No.1, pp.7887

[4]. Ing-Chao Lin, Yu-Hung Cho, and Yi-Ming Yang. (2014). “Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[5]. Jiang, H. Han, J. Qiao, and F. Lombardi, F.,(2015). "Approximate Radix8 Booth Multipliers for Low Power and High performance Operation," in Computers, IEEE Transactions on , Vol. PP, No.99, pp.1.

[6]. Jiun-Ping Wang, Shiann-RongKuang, and Shish- Chang Liang., (2011). “High-Accuracy Fixed-Width Modified Booth Multipliers for Lossy Applications”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 19, No. 1.

[7]. More, T.V. and Kshirsagar, R.V.,(2011). "Design of low power column bypass multiplier using FPGA," in Electronics Computer Technology (ICECT), 3rd International Conference on , Vol.3, No.810, pp.431435.

[8]. Prabhu, A.S. and Elakya, V.,(2012). "Design of modified low power booth multiplier," in Computing, C o m m u n i c a t i o n a n d A p p l i c a t i o n s ( I C C C A ) , International Conference on, Vol.22, No.24, pp.16.

[9]. Rajput, R.P. and Swamy, M.N.S., (2012). "High Speed Modified Booth Encoder Multiplier for Signed and Unsigned Numbers," in Computer Modelling and th Simulation (UKSim), UKSim 14 International Conference on , Vol. 28, No. 30, pp. 649-654.

[10]. Srinivas, K.B. and Aneesh, Y.M.,(2014). "Low power and high speed row and column bypass multiplier," in Computational Intelligence and Computing Research (ICCIC), IEEE International Conference on, Vol.18, No.20, pp.14.

[11]. Surendran, E.K.L. and Antony, P.R.,(2014). "Implementation of fast multiplier using modified Radix4 booth algorithm with redundant binary adder for low energy applications," in Computational Systems and Communications (ICCSC), First International Conference on, Vol.17, No.18, pp. 266-271.

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Research Paper

OTRA Based Precision Rectifier

Rashika Anurag* , Neeta Pandey, Rajeshwari Pandey*, Ritu Vijay****

* Associate Professor, Department of Electronics and Communication Engineering, JSS Academy of Technical Education, Uttar Pradesh, India.

_* Associate Professor, Department of Electronics and Communication Engineering, Delhi Technological University, Delhi, India.
**** Associate Professor, Department of Electronics, Banasthali University, Rajasthan, India.

Anurag, R.,Pandey, N.,Pandey, R., and Vijay, R. (2015). OTRA Based Precision Rectifier. i-manager's Journal on Electronics Engineering, 6(1), 21-27. https://doi.org/10.26634/jele.6.1.3682

Abstract

Analog integrated circuit design is receiving a tremendous boost due to the development and application of Current- Mode (CM) processing. Application of CM techniques provides wider bandwidth; which is virtually independent of the closed loop gain, greater linearity and large dynamic range. The Operational Transresistance Amplifier (OTRA) has emerged as an effective alternate current mode analog building block. It is a high gain current input, voltage output amplifier and also free from parasitic input capacitances and resistances as its input terminals are virtually grounded thus eliminating response limitations due to parasitics. OTRA is used as an analog building block for realizing a number of circuits having applications in signal processing and generation. Precise rectification is an important requirement in instrumentation and measurement circuits and is addressed in this paper. Traditionally, diodes are used to build rectifiers however; rectification is not permitted below a voltage of ∼ 0.7 V for silicon and ∼ 0.3 V for germanium diodes due to cutin voltage. For low voltage applications, Operational Amplifiers (OPAMP) with diode connected in feedback is used which prevents the fast switching of the diodes in high frequency range due to slew rate limitation of OPAMP. This paper aims at presenting an OTRA based FWR which is suitable for low voltage rectification. The functionality of the proposed circuit is validated through SPICE simulation for which OTRA is realized using Current Feedback Operational Amplifier (CFOA).The simulation results are found in close agreement to the theoretical results.

References

[1]. Yuan F., (2007). “CMOS Current-mode Circuits for Data Communications”, Springer Science & Business Media.

[2]. Salama K. N. and Soliman A. M., (1999). “CMOS Operational Transresistance Amplifier for Analog Signal Processing”, Microelectronics Journal, Vol. 30, No. 3, pp. 235-245.

[3]. Cam U., (2002). “A Novel Single-resistance-controlled Sinusoidal Oscillator Employing Single Operational Transresistance Amplifier”, Analog Integrated Circuits and Signal Processing, Vol. 32, No. 2, pp. 183-186.

[4]. Pandey R., Pandey N., Paul S. K., Singh A., Sriram B., and Trivedi K., (2014). “Novel Grounded Inductance Simulator Using Single Otra”, International Journal of Circuit Theory and Applications, Vol. 42, No.10, pp. 1069- 1079.

[5]. Bothra M., Pandey R., Pandey N., & Paul S. K., (2013). “Operational Trans-resistance Amplifier Based Tunable Wave Active filte”, Radio Engineering, Vol. 22, No.1, pp.159 -166.

[6]. Gayakwad R. A., (2007). “Op-Amps and linear Integrated Circuits”, Prentice-Hall, Inc.

[7]. Gift S. J., (2000). “A High-Performance Full-Wave Rectifier Circuit”, International Journal of Electronics, Vol. 87, No. 8, pp. 925-930.

[8]. Gift S. J., and Maundy B., (2007). “Versatile Precision Full -w a v e R e c t i f i e r s f o r I n s t r u m e n t a t i o n a n d Measurements”, Instrumentation and Measurement, IEEE Transactions on, Vol. 56, No. 5, pp. 1703-1710.

[9]. Toumazou C., Lidgey F. J., and Chattong S., (1994). “High frequency current conveyor precision full-wave rectifier”, Electronics Letters, Vol. 30, No.10, pp. 745-746.

[10]. Hayatleh K., Porta S., and Lidgey F. J., (1994). “Temperature independent current conveyor precision rectifier”, Electronics letters, Vol. 30, No. 25, pp. 2091- 2093.

[11]. Monpapassorn A., Dejhan K., and Cheevasuvit F., (2001). “A full-wave rectifier using a current conveyor and current mirrors”, International Journal of Electronics, Vol. 88, No. 7, pp. 751-758.

[12]. Surakampontorn W., Anuntahirunrat K., and Riewruja V., (1998). “Sinusoidal frequency doubler and full-wave rectifier using translinear current conveyor”, Electronics Letters, Vol. 34, No. 22, pp. 2077-2079.

[13]. Yuce E., Minaei S., and Cicekoglu O., (2006). “Fullwave rectifier realization using only two CCII+ s and NMOS transistors”, International Journal of Electronics, Vol. 93, No. 8, pp. 533-541.

[14]. Kumngern M., (2011). “Precision full-wave rectifier using two DDCCs”, Circuits and Systems, Vol. 2, No. 3, pp. 127.

[15]. Jongkunstidchai C., Fongsamut C., Kumwachara K., and Surakampontorn W., (2007). “Full-Wave Rectifiers Based on Operational Transconductance Amplifiers”, A E U - I n t e r n a t i o n a l J o u r n a l o f E l e c t ro n i c s a n d Communications, Vol. 61, No. 3, pp. 195-201.

[16]. Tiliute D. E., (2003). “Full-Wave current-mode Precision Rectifiers Using unity - Gain Cell”, Electronics and Electrical Engineering, Vol. 49, No. 07, pp. 26-29.

[17]. Biolek D., Hancioglu E., and Keskin A. U., (2008). “ H i g h - p e r f o r m a n c e C u r r e n t D i f f e r e n c i n g Transconductance Amplifier and its Application in Precision Current-mode Rectification”, AEU - International Journal of Electronics and Communications, Vol. 62, No. 2, pp. 92-96.

[18. Koton J., Herencsar N., Vrba K., and Minaei S., (2011). “Precision Full-wave Current-mode Rectifier Using Current D i f f e r e n c i n g Tr a n s c o n d u c t a n c e Amp l i f i e r ” , I n Communication Software and Networks (ICCSN), IEEE 3rd International Conference , pp. 460-463 .

[19]. Khateb F., Vávra J., and Biolek D., (2010). “A Novel Current-mode Full-wave Rectifier Based on one CDTA and two Diodes”, Radio Engineering, Vol.19, No. 3, pp. 437- 445.

[20]. Tangsrirat W., Pukkalanun T., and Surakampontorn W., (2011). “ Synthesis of Current Differencing Transconductance Amplifier-based Current Limiters and its applications”, Journal of Circuits, Systems, and Computers, Vol. 20, No. 02, pp.185-206.

[21]. Hou C. L., Chien H. C., and Lo Y. K., (2005). “Squarewave generators employing OTRAs”, IEEE Proceedings-Circuits, Devices and Systems, Vol. 152. No. 6, pp. 718-722.

[22]. Lo Y. K., Chien H. C., and Chiu H. J., (2008). “Switchcontrollable OTRA - based bistable multivibrators”, IET circuits, devices & systems, Vol. 2, No. 4, pp. 373-382.

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Research Paper

A Novel Method to Eliminate Selective Harmonicsin a Multilevel Inverter

Nimain Charan Nayak*

Professor, Department of Electrical and Electronics Engineering , MNM Jain Engineering College, Chennai, India.

Nayak, N.C. (2015). A Novel Method to Eliminate Selective Harmonics in a Multilevel Inverter . i-manager's Journal on Electronics Engineering, 6(1), 28-40. https://doi.org/10.26634/jele.6.1.3683

Abstract

This paper deals with the harmonic elimination in multilevel inverters. Multilevel inverters are advanced types of inverters. The desired level of levels is obtained by using the method of triggering. A seven level cascaded H-bridge inverter has been used here. To synthesize multilevel output AC voltage using different levels of DC input, semiconductor devices must be switched on and off. The output contains harmonic and total harmonic distortion. These affect the solution and hence have to be eliminated. Selective harmonic elimination is the method in which the author selects the harmonics which needs to be eliminated. Different methods are used to eliminate the harmonics. In this paper, the author makes use of genetic algorithm to eliminate the harmonics. Genetic algorithm is a computational algorithm that solves optimization problem by imitating the genetic processes and the theory of evolution. It imitates biological evolution by using parameters such as reproduction, crossover mutation etc. The fitness function of multilevel inverters is solved and firing angles are obtained. These firing angles are obtained to the semiconductor devices and output with minimum harmonics and total harmonic distortions are obtained.

References

[1]. Hui Zhang, Kaipei Liu, M. Braun, and C.C. Chan (2006). “Selective Harmonic Controlling for Three-Level High Power Active Front End Converter with Low Switching Frequency”, IEEE Trans. on Industry Applications, Vol. 68, No. 2, pp. 444-449 .

[2]. “Voltage Source PWM inverter”, A pdf from the google search.

[3]. Dr. P.S.Bimbhra, “Power Electronics”.

[4]. Jagdish Kumar, Biswarup Das and Pramod Agarwal (2008). “Selective Harmonic Elimination Technique for a Multilevel Inverter”, Fifteenth National Power Systems Conference (NPSC), IIT Bombay.

[5]. Jih-Sheng Lai, and Fang Zheng Peng (2003). “Multilevel Converters-A New Breed of Power Converters”, IEEE Trans. on Industry Applications, Vol. 32.

[6]. Jose Rodriguez, J S Lai and F. Z. Peng (2002). “Multilevel Inverters: A Survey of Topologies, Controls, and Applications”, IEEE Trans. on Industrial Electronics, Vol. 49, No. 4, pp. 724-738.

[7]. Fang Zheng Peng, Jih-Sheng, Lai et. al, (1996). “A Multilevel Voltage-Source Inverter with Separate DC Sources for Static Var Generation”, IEEE Trans. on Industry Applications, Vol. 32, No. 5, pp. 1130-1138.

[8]. Muhammad H.Rashid, “Power Electronics Circuits, Devices and Applications”, Third Edition.

[9]. L.M Tolbert, F. Z. Peng, T.G. Habetler 2008. “Multilevel PWM methods at low modulation indices,” IEEE Transactions on Power Electronics, Vol.15,No. 4, pp. 719 – 725.

[10]. J. Chiasson, L. M. Tolbert, K. McKenzie, and Z. Du (2002). “Eliminating Harmonics in a Multilevel Converter Using Resultant Theory,” Conference Proceedings of IEEE Power Electronics Specialists Conference, Vol. 2, pp. 503– 508.

[11]. J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, and Z. Du, (2004). “A Complete Solution to the Harmonic Elimination Problem,” IEEE Transactions on Power Electronics, Vol.19, No. 2, pp. 491 – 499.

[12]. M. Klabunde, Y. Zhao and T. A. Lipo (1994). “Current Control of a 3 Level Rectifier/Inverter Drive System,” in Conference Record 1994 IEEE IAS Annual Meeting, pp. 2348–2356.

[13]. Burak Ozpineci, Leon M. Tolbert, and John N. Chiasson (2005). “Harmonic Optimization of Multilevel Converters Using Genetic Algorithms”, IEEE Power Electronics Letters, Vol. 3, No. 3, pp. 92-95.

[14]. John N. Chiasson, Leon M. Tolbert, Keith J. McKenzie, and Zhong Du (2003). “Control of a Multilevel Converter Using Resultant Theory”, IEEE Transaction on Control Systems Technology, Vol. 11, No. 3, pp. 345-353.

[15]. Ozpineci B., Tolbert L.M., and Chiasson J.N. (2004). “Harmonic optimization of multilevel converters using genetic algorithms”, IEEE Power Electronics Specialists th Conference, 35 Annual, Vol. 5, pp. 3911–3916.

[16]. L. Parsa and H. M. Toliyat, (2003). “Multiphase permanent magnet motor drives,” in Proc. Industrial Application Soc. Annu. Meeting, pp. 401–408.

[17]. H. Xu, H. A. Toliyat and L. J. Petersen (2002). “Five - Phase Induction Motor Drives with DSP-Based Control System,” IEEE Trans. Power Electron, Vol. 17, No. 4, pp. 524–533.

[18]. A. A. Edris, S. Zelingher, L. Gyugyi and L. J. Kovalsky, (2002), "Squeezing more power from the grid," Power Engineering Review, IEEE, Vol. 22,No. 6, pp. 4-6.

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Research Paper

Study of Electromagnetic Interference

M. Satish Kumar* , A. Jhansi Rani**

* Assistant Professor, Department of Electronics and Communication Engineering, Sri Vasavi Engineering College, Tadepalligudem, India.

** Professor, Department of Electronics and Communication Engineering, V. R. Siddhardha Engineering College, Vijayawada, India.

Kumar, M.S., and Rani, A.J. (2015). Study of Electromagnetic Interference. i-manager's Journal on Electronics Engineering, 6(1), 41-46. https://doi.org/10.26634/jele.6.1.3684

Abstract

The life on Earth has been adapted to survive in an environment of natural low-frequency Electromagnetic (EM) fields in addition to the Earth's Static Geo-Magnetic field. Natural EM fields of low frequency come from two main sources, the sun and thunderstorm activity. However, fields produced by various Electrical and Electronic Systems such as Radio and Television broadcast stations, Communication Transmitters etc., and Automobile Ignition systems, Industrial Control Equipment radiate Electromagnetic Energy at much higher intensities during their normal operation. The electromagnetic environment created by these Intentional and Unintentional sources with a very different Spectral Distribution has altered this natural EM background. The electromagnetic environment created by these Intentional and Unintentional sources, when sufficiently strong, Interferes with the operation of many electrical and electronics equipment and systems which degrades the performance of the system. So the study of Electromagnetic Fields which becomes an interference to the Systems’ operation is needed. For analysis of EM fields, simulation of Co-Axial cable using CST is considered [4].

References

[1]. D Bozec, (1998). “Banana Skins”, UK EMC Journal, Vol. 15, pp. 8.

[2]. Jeffrey L Silberberg, (1993). “Performance Degradation of Electronic Medical Devices Due to Electromagnetic Interference”, Compliance Engineering , Vol. 10,pp. 25.

[3]. Medical Devices Agency, (1997). “Electromagnetic Compatibility of Medical Devices with Mobile Communications”, MDA DB 9702.

[4]. C st Studio Suite., Retired from https://www.cst.com.

[5]. Medical Devices Agency, (1997). “Electromagnetic Compatibility of Medical Devices with Mobile Communications”, MDA DB 9702.

[6] V.P.Kodali, (1996). “Engineering EMC Principles, Measurements and Technologies”, IEEE Press, New york.

i-manager's Journal on Electronics Engineering (JELE)

Current Issue Vol. 15 Issue 1

Most Read

Most Cited

Volume 6 Issue 1 September - November 2015

Trichotomous Bayes Factor Analysis [Tri–BFA]: A Post HocProbability Confirmatory Data Analysis Assurance ModelDesigned to Determine the Validity, Viability, andVerifiability of E–Learning Hypotheses

James Edward Osler II*

Faculty member, Department of Curriculum and Instruction, North Carolina Central University (NCCU) School of Education, USA.

Abstract

References

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Aging Aware Radix-4 Booth Multiplier WithAdaptive Hold Logic and Razor Flip Flop

SUVARNA* , K.Rajesh**, S.Veerakumar***

* PG Scholar, Department of Electronics and Communication Engineering, Knowledge Institute of Technology, Salem, India. **_*** Assistant Professor, Department of Electronics and Communication Engineering, Knowledge Institute of Technology, Salem, India.

Suvarna, S., Rajesh, K. and Veerakumar, S. (2015). Aging Aware Radix-4 Booth Multiplier With Adaptive Hold Logic and Razor Flip Flop. i-manager's Journal on Electronics Engineering, 6(1), 13-20. https://doi.org/10.26634/jele.6.1.3681

Abstract

References

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OTRA Based Precision Rectifier

Rashika Anurag* , Neeta Pandey**, Rajeshwari Pandey***, Ritu Vijay****

Anurag, R.,Pandey, N.,Pandey, R., and Vijay, R. (2015). OTRA Based Precision Rectifier. i-manager's Journal on Electronics Engineering, 6(1), 21-27. https://doi.org/10.26634/jele.6.1.3682

Abstract

References

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A Novel Method to Eliminate Selective Harmonicsin a Multilevel Inverter

Nimain Charan Nayak*

Professor, Department of Electrical and Electronics Engineering , MNM Jain Engineering College, Chennai, India.

Nayak, N.C. (2015). A Novel Method to Eliminate Selective Harmonics in a Multilevel Inverter . i-manager's Journal on Electronics Engineering, 6(1), 28-40. https://doi.org/10.26634/jele.6.1.3683

Abstract

References

Full Article (HTML)

Pdf

Study of Electromagnetic Interference

M. Satish Kumar* , A. Jhansi Rani**

* Assistant Professor, Department of Electronics and Communication Engineering, Sri Vasavi Engineering College, Tadepalligudem, India. ** Professor, Department of Electronics and Communication Engineering, V. R. Siddhardha Engineering College, Vijayawada, India.

Kumar, M.S., and Rani, A.J. (2015). Study of Electromagnetic Interference. i-manager's Journal on Electronics Engineering, 6(1), 41-46. https://doi.org/10.26634/jele.6.1.3684

Abstract

References

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SUVARNA* , K.Rajesh, S.Veerakumar*

* PG Scholar, Department of Electronics and Communication Engineering, Knowledge Institute of Technology, Salem, India.

_* Assistant Professor, Department of Electronics and Communication Engineering, Knowledge Institute of Technology, Salem, India.

Rashika Anurag* , Neeta Pandey, Rajeshwari Pandey*, Ritu Vijay****

* Assistant Professor, Department of Electronics and Communication Engineering, Sri Vasavi Engineering College, Tadepalligudem, India.

** Professor, Department of Electronics and Communication Engineering, V. R. Siddhardha Engineering College, Vijayawada, India.