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i-manager's Journal on Circuits and Systems (JCIR)

Current Issue Vol. 12 Issue 1

Dynamic Simulation and Sensitivity Analysis of Steam Generation Solar Power Plant
Unified Power Quality Conditioner (UPQC) Research Study on Steady - State Power Flow
Photovoltaic Module Failure Detection using Machine Vision and Lazy Learning Technique
Design and Implementation of Wallace Tree Multiplier and Its Applications in FIR Filter
Review on Obstacle Detection in Solar Panel Cleaning Applications

Most Cited

Volume 7 Issue 2 March - May 2019

Research Paper

An Energy-Efficient Adiabatic Logic Based LFSR

M. K. Saini* , N. Pandey, Nitish*

*-*** Department of Electronics and Communication Engineering, Delhi Technological University (formerly Delhi College of Engineering), Delhi, India.

Saini, M. K., Pandey, N., and Nitish. (2019). An Energy-Efficient Adiabatic Logic based LFSR. i-manager's Journal on Circuits and Systems , 7(2), 1-10. https://doi.org/10.26634/jcir.7.2.16421

Abstract

Today's major challenge in designing electronic circuits is to deliver high-performance with minimal power dissipation. While electronic devices have achieved tremendous improvement in performance and area reduction over the last decade, as a consequence the power dissipation has increased many folds. Adiabatic logic style is a promising technique aimed at building energy-efficient devices at a structural level. A linear feedback shift register (LFSR) is a circuit extensively used for pseudo-random number generation, which finds applications in cryptography and circuit testing. An LFSR dissipates high dynamic power in its operation and is, therefore, an excellent candidate to evaluate the benefits of using the adiabatic logic style for power reduction versus the conventional CMOS logic style. Various adiabatic logic families exist; their structures mainly differ in the presence or absence of diodes. In this paper, an LFSR based pseudo-random number generator is implemented using popular adiabatic logic families like Two-Phase Adiabatic Static CMOS Logic (2PASCL), which uses diodes and other diode-free adiabatic logic styles like Clocked CMOS Adiabatic Logic (CCAL) and Diode-Free Adiabatic Logic (DFAL). A comparison of these implementations is made for power consumption, time delay and Power-Delay Product (PDP) with the conventional CMOS logic style, substantiating the superiority of the adiabatic logic families in terms of power and PDP. The suitability of these adiabatic logic families is also evaluated for different applications. The simulations are carried out on TANNER EDA TSPICE using 0.18 micron CMOS technology BSIMv3.1 parameters.

References

[1]. Abramovici, M., Breuer, M. A., & Friedman, A. D. (1990). Digital Systems Testing and Testable Design. New York: IEEE Press.

[2]. Anuar, N., Takahashi, Y., & Sekine, T. (2010). Two phase clocked adiabatic static CMOS logic and its logic family. JSTS: Journal of Semiconductor Technology and Science, 10(1), 1-10. https://doi.org/10.5573/JSTS.2010.10.1.001

[3]. Athas, W. C., Svensson, L. J., Koller, J. G., Tzartzanis, N., & Chou, E. Y. C. (1994). Low-power digital systems based on adiabatic-switching principles. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2(4), 398-407. https://doi.org/10.1109/92.335009

[4]. Dickinson, A. G., & Denker, J. S. (1995). Adiabatic dynamic logic. IEEE Journal of Solid-State Circuits, 30(3), 311-315. https://doi.org/10.1109/4.364447

[5]. Gosain, V., Grover, V., Pandey, N., & Gupta, K. (2017, August). Look ahead carry adder using diode free adiabatic logic family. In 2017 2^nd International Conference on Telecommunication and Networks (TELNET) (pp. 1-4). IEEE. https://doi.org/10.1109/TEL-NET.2017. 8343535

[6]. Li, H., Zhang, Y., & Yoshihara, T. (2013, November). Clocked CMOS adiabatic logic with low-power dissipation. In 2013 International SoC Design Conference (ISOCC) (pp. 064-067). IEEE. https://doi.org/10.1109/ ISOCC.2013.6863986

[7]. Maksimovic, D., Oklobdzija, V. G., Nikolic, B., & Current, K. W. (2000). Clocked CMOS adiabatic logic with integrated single-phase power-clock supply. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 8(4), 460-463. https://doi.org/10.1109/ 92.863629

[8]. Mano, M. M., & Ciletti, M. D. (2013). Digital Design: With an Introduction to the Verilog HDL (5^th Ed.). New Jersey: Pearson Education.

[9]. Moon, Y., & Jeong, D. K. (1996). An efficient charge recovery logic circuit. IEEE Journal of Solid-State Circuits, 31(4), 514-522. https://doi.org/10.1109/4.499727

[10]. Pandey, N., Gupta, K., & Kuhar, T. (2016, March). Pre-scalar for diode free adiabatic logic family. In 2016 International Conference on Computational Techniques in Information and Communication Technologies (ICCTICT) (pp. 481-485). IEEE. https://doi.org/10.1109/ ICCTICT.2016.7514628

[11]. Pandey, N., Pandey, R., & Gupta, K. (2015, December). DFAL based implementation of frequency divider-by-3. In 2015 Annual IEEE India Conference (INDICON) (pp. 1-6). IEEE. https://doi.org/10.1109/IND ICON.2015.7443555

[12]. Puri, H., Ghai, K., Gupta, K., & Pandey, N. (2014, February). A novel DFAL based frequency divider. In 2014 International Conference on Signal Processing and Integrated Networks (SPIN) (pp. 526-530). IEEE. https://doi.org/10.1109/SPIN.2014.6777010

[13]. Reddy, N. S. S., Satyam, M., & Kishore, K. L. (2008). Cascadable adiabatic logic circuits for low-power applications. IET Circuits, Devices & Systems, 2(6), 518- 526. https://doi.org/10.1049/iet-cds:20080106

[14]. Sundar, M., & Singh, Y. (2016). Ultra low power design of sequential logic circuits using adiabatic logic. International Journal of VLSI System Design and Communication Systems, 4(3), 235-238.

[15]. Teichmann, P. (2012). Adiabatic Logic: Future Trend and System Level Perspective. New York: Springer Science & Business Media.

[16]. Upadhyay, S., Mishra, R. A., Nagaria, R. K., & Singh, S. P. (2013). DFAL: Diode-free adiabatic logic circuits. ISRN Electronics, 2013, 1-12. https://doi.org/10.1155/2013/ 673601

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Research Paper

Design of new Universal Filters with Second Generation Current Conveyor

G. Appala Naidu* , B. T. Krishna**

*-** Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University, Kakinada, Andhra Pradesh, India.

Naidu, G. A., and Krishna, B. T. (2019). Design of New Universal Filters with Second Generation Current Conveyor. i-manager's Journal on Circuits and Systems , 7(2), 11-20. https://doi.org/10.26634/jcir.7.2.16444

Abstract

In this paper, new type of single input and three output universal filters with current conveyor as an active element is proposed. Current conveyor works similar to operational amplifier but the input and output signals are current rather than voltage. There are several types of current conveyors exist. Out of the existing, Second order current conveyor (CCII) is chosen as an active element. The proposed circuits are designed using the similar type of active element and grounded passive components. The detailed mathematical analysis is carried out. The necessary expressions for quality factor and sensitivity are also derived. The responses of High pass filter, Low pass filter and Band pass filter are measured simultaneously. The notch and all pass filters can also be realized by adding the appropriate components. All simulation work is carried out with MULTISIM 13.0. The comparative analysis is carried out with the existing techniques and is tabulated. It has been observed that the proposed circuits works good in comparison with the existing topologies.

References

[1]. Chen, H. P. (2013). Versatile current-mode universal biquadratic filter using DO-CCIIs. International Journal of Electronics, 100(7), 1010-1031. https://doi.org/10.1080/ 00207217.2012.731370

[2]. Çİçekoğlu, O. (2001). High output impedance current-mode four-function filter with reduced number of active and passive elements using the dual output current conveyor. Analog Integrated Circuits and Signal Processing, 28(2), 201-204. https://doi.org/10.1023/A: 1011298201217

[3]. Çiçekoğlu, O., Tarim, N., & Kuntman, H. (2002). Wide dynamic range high output impedance current-mode multifunction filters with dual-output current conveyors. AEU - International Journal of Electronics and Communications, 56(1), 55-60. https://doi.org/10.1078/ 1434-8411-54100073

[4]. Hamad, A. R. (2016). A new current-mode tow-thomas biquad filter using differential voltage current conveyor (DVCC). ZANCO Journal of Pure and Applied Sciences, 28(2), 70-77. https://doi.org/10.21271/ zjpas.v28i2.545

[5]. Horng, J. W., Hou, C. L., Chang, C. M., Shie, J. Y., & Chang, C. H. (2007). Universal current filter with single input and three outputs using MOCCIIs. International Journal of Electronics, 94(4), 327-333. https://doi.org/10. 1080/00207210701289551

[6]. Keskin, A. Ü., & Cam, U. (2007). Insensitive high-output impedance minimum configuration SITO-type current-mode biquad using dual-output current conveyors and grounded passive components. AEU-International Journal of Electronics and Communications, 61(5), 341- 344. https://doi.org/10.1016/j.aeue.2006.06.001

[7]. Minaei, S., Kuntman, H., Cicekoglu, O., Turkoz, S., & Tarim, N. (2000, December). A new high output impedance current-mode universal filter with single input and three outputs using dual output CCIIs. In ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No. 00EX445) (Vol. 1, pp. 379-382). IEEE. https://doi.org/10.1109/ICECS.2000.911560

[8]. Mohan, P. V. A. (2003). Current Mode VLSI Analog Filters: Design and Applications. Boston: Birkhauser.

[9]. Naidu, G. A., & Krishna, B. T. (2017). A comparative analysis of universal filters using current conveyors. Indian Journal of Science and Technology, 10(20), 1-8. https://doi.org/10.17485/ijst/2017/vloi20/10222

[10]. Ozoguz, S., & Acar, C. (1997). Universal currentmode filter with reduced number of active and passive components. Electronics Letters, 33(11), 948-949. https://doi.org/10.1049/el:19970632

[11]. Ozoguz, S., Toker, A., & Cicekoglu, O. (1998). High output impedance current-mode multifunction filter with minimum number of active and reduced number of passive elements. Electronics Letters, 34(19), 1807-1809. https://doi.org/10.1049/el:19981280

[12]. Psychalinos, C., Kasimis, C., & Khateb, F. (2018). Multiple-input single-output universal biquad filter using single output operational transconductance amplifiers. AEU - International Journal of Electronics and Communications, 93, 360-367. https://doi.org/10.1016/ j.aeue.2018.06.037

[13]. Ramezani, M., & Ahmadpoor, N. (2013). New current mode universal filter by a novel low voltage second generation current conveyor. Microelectronics and Solid- State Electronics, 2(3), 52-57. https://doi.org/10. 5923/j.msse.20130203.03

[14]. Sagbas, M., Fidanboylu, K., & Bayram, M. C. (2004). A new current-mode multifunction filter with high impedance outputs using minimum number of passive elements. International Journal of Applied Mathematics and Computer Sciences, 1(2), 325-328.

[15]. Sedra, A. S., & Smith, K. (1970). A second-generation current conveyor and its applications. IEEE Transactions on circuit theory, 17(1), 132-134. https://doi.org/10.1109/ TCT.1970.1083067

[16]. Shah, N. A., & Malik, M. A. (2005). Current-mode universal biquadratic filter with single input and four outputs using FTFNs. Indian Journal of Pure & Applied Physics, 43, 142-144.

[17]. Smith, K. C., & Sedra, A. (1968). The current conveyor - A new circuit building block. In Proceedings of the IEEE, 56(8), 1368-1369. https://doi.org/10.1109/PROC.1968. 6591

[18]. Soliman, A. M. (2008). Current-mode universal filters using current conveyors: Classification and review. Circuits, Systems & Signal Processing, 27(3), 405-427. https://doi.org/10.1007/s00034-008-9034-y

[19]. Supavarasuwat, P., Kumngern, M., Sangyaem, S., Jaikla, W., & Khateb, F. (2018). Cascadable independently and electronically tunable voltage-mode universal filter with grounded passive components. AEU- International Journal of Electronics and Communications, 84, 290-299. https://doi.org/10.1016/j. aeue.2017.12.002

[20]. Surakampontorn, W., Riewruja, V., Kumwachara, K., & Dejhan, K. (1991). Accurate CMOS-based current conveyors. IEEE Transactions on Instrumentation and Measurement, 40(4), 699-702. https://doi.org/10.1109/ 19.85337

[21]. Temizyurek, C., & Myderrizi, I. (2003, December). Current-mode universal filter implemented with DVCCs. In International Conference on Electrical and Electronics Engineering.

[22]. Toker, A., & Ozoguz, S. (2000). Insensitive currentmode universal filter using dual output current conveyors. International Journal of Electronics, 87(6), 667-674. https://doi.org/10.1080/002072100131869

[23]. Toker, A., & Özuğuz, S. (2001). Integrable current-mode filter realisation using dual-output current conveyors for low-frequency operation. AEU-International Journal of Electronics and Communications, 55(2), 145- 149. https://doi.org/10.1078/1434-8411-00022

[24]. Toker, A., Özoğuz, S., & Çiçekoğlu, O. (1999). High output impedance current-mode multifunction filters with minimum number of active and passive elements using dual-output current conveyors. Frequenz, 53(9-10), 206- 209. https://doi.org/10.1515/FREQ.1999.53.9-10.206

[25]. Tonk, A., & Afzal, N. (2019). Second generation fully differential current conveyor based analog circuits. Journal of Semiconductors, 40 (4), 042401. https://doi.org/10.1088/1674-4926/40/4/042401

[26]. Yuce, E., & Minaei, S. (2008). Signal limitations of the current-mode filters employing current conveyors. AEU-International Journal of Electronics and Communications, 62(3), 193-198. https://doi.org/10. 1016/j.aeue.2007. 03.015

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Research Paper

Simulation Design of Automatic Voltage Regulator over Unavailability of Analog Automatic Voltage Regulator

Pushan Kumar Datta* , Birajashis Pattnaik**

*-** School of Engineering and Technology, Amity University Kolkata, West Bengal, India.

Datta, P. K., and Pattnaik, B. (2019). Simulation Design of Automatic Voltage Regulator over Unavailability of Analog Automatic Voltage Regulator. i-manager's Journal on Circuits and Systems , 7(2), 21-26. https://doi.org/10.26634/jcir.7.2.16454

Abstract

The aim of this study is to implement better heuristics in solving the issue of hysteresis in design of an automatic voltage regulator to bring significant precision and resolution. In rural areas, voltage provided continues to be lesser than specified that does not provide the necessary feed to the electronic circuits where it may be required. This puts sophisticated electronic devices such as computers and other devices at substantial risk. In this proposed work simulated the entire automatic voltage regulator section in Multisim is simulated and hereby proposed a signal conditioning circuit that can resolve the issue of identifying the role of a linear circuit design and a small signal analyzer for amplitude frequency characteristics. In order to restore this circumstance, this research identifies the mechanism for stabilizing a diverse range of input voltage from the lowest to the highest value by discussing a measuring circuit that drives the transformer from either the main side to the secondary side repeatedly. This study therefore proposes an alternative solution by developing an Automatic Voltage Regulator (AVR) involving design of different controllers and systems that operate within the monitoring range. The digital AVR requires certain computational modifications based on certain parameters and features.

References

[1]. Attia, H. (2015). Three steps AC voltage regulator based on one step-down transformer. International Journal of Applied Engineering Research, 10(19), 39898- 39902.

[2]. Bhatt, V. K., & Bhongade, S. (2013). Design of PID controller in automatic voltage regulator (AVR) system using PSO technique. International Journal of Engineering Research and Applications (IJERA), 3(4), 1480-1485.

[3]. Hamza, A. K., & Bonneya, M. F. (2019, May). Step voltage regulator and capacitor placement to improve the performance of rural electrical distribution systems by CYME program. In IOP Conference Series: Materials Science and Engineering (Vol. 518, No. 4, p. 042013). IOP Publishing. https://doi.org/10.1088/1757-899X/518/ 4/042013

[4]. Haque, M. M., Hossain, M. K., Ali, M. M., & Sheikh, M. R. I. (2011). Microcontroller based single phase digital prepaid energy meter for improved metering and billing system. International Journal of Power Electronics and Drive Systems, 1(2), 139-147. https://doi.org/10.11 591/ijpeds.v1i2.138

[5]. Hoque, M. M. (2014). Design, implementation and performance study of programmable automatic voltage regulator. Journal of Electrical Systems, 10(4), 4 72-483.

[6]. Kundur, P., Balu, N. J., & Lauby, M. G. (1994). Power system stability and control. New York: McGraw-hill.

[7]. Machowski, J., Bialek, J., & Bumby, J. (2011). Power system dynamics: Stability and control (2^ndEd.). United States: John Wiley & Sons.

[8]. Mathur, P., Rajpurohit, V. S., & Srivastava, R. K. (2018). Comparative analysis of PID tuning of AVR. International Journal on Future Revolution in Computer Science & Communication Engineering, 4(1), 53-56.

[9]. Mukti, E. W., Wijanarko, S., & Muqorobin, A. (2016). Replacement of analog automatic voltage regulator using digital technology. International Journal of Electrical & Computer Engineering, 6(1), 53-62.

[10]. Nagai, S., & Itoh, J. I. (2019). Open-loop-based island-mode voltage control method for single-phase grid-tied inverter with minimized LC filter. IEEE Journal of Industry Applications, 8(1), 108-115. https://doi.org/10.15 41/ieejjia.8.108

[11]. Nawaz, A., & Arbab, M. N. (2013). Voltage regulation of variable speed wind turbine using MATLAB/Simulink. International Journal of Engineering and Advanced Technology (IJEAT), 2(5), 357-360.

[12]. Schaef, C., Desai, N., Krishnamurthy, H., Weng, S., Do, H., Lambert, W., ... & De, V. (2019, February). 8.5 A fully integrated voltage regulator in 14nm CMOS with package-embedded air-core inductor featuring selftrimmed, digitally controlled variable on-time discontinuous conduction mode operation. In 2019 IEEE International Solid-State Circuits Conference-(ISSCC) (pp. 154-156). IEEE. https://doi.org/10.1109/ISSCC.2019. 8662294

[13]. Sisworahardjo, N. S., El-Sharkh, M. Y., & Alam, M. S. (2008). Neural network controller for microturbine power plants. Electric Power Systems Research, 78(8), 1378- 1384. https://doi.org/10.1016/j.epsr.2007.12.004

[14]. Tarchanidis, K. N., Lygouras, J. N., & Botsaris, P. (2013). Voltage stabilizer based on SPWM technique using microcontroller. Journal of Engineering Science and Technology Review, 6(1), 38-43. https://doi.org/10.25 103/jestr.061.08

[15]. Zhou, G., Ya, T., & Zhao, S. (2014). A three-phase AC-voltage regulator system. Telkomnika Indonesian Journal of Electrical Engineering, 12 (5), 3501-3508.https://doi.org/10.11591/telkomnika.v12i5.3503

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Research Paper

Simulation of Matrix Converter based High Frequency Power Electronic Traction Transformer

Ruksana S. K.*

* Department of Electrical and Electronics Engineering, Vasavi College of Engineering, Hyderabad, Telangana, India.

Ruksana, SK. (2019). Simulation of Matrix Converter based High Frequency Power Electronic Traction Transformer. i-manager's Journal on Circuits and Systems , 7(2), 27-37. https://doi.org/10.26634/jcir.7.2.16683

Abstract

This paper presents the concepts of three phase matrix converter based power electronic transformer for electric traction applications. The proposed high frequency Power Electronic Transformer (PET) will regulate the voltage level of the crossing train. The power electronic transformer with three phase matrix converter is used to step up frequency at the primary side and single phase matrix converter is to step down frequency at the secondary side for catenary. Power Electronic Transformer has several advantages over conventional solid state 50 Hz transformer. The control technique adopted is Space Vector Modulation (SVM) Technique for three phase matrix converter and Sinusoidal Pulse Width Modulation (SVM) for single phase matrix converter. The results of the Power Electronic Transformer along with the filters have been presented in this paper. The proposed topology has been implemented in the MATLAB/SIMULINK software and the desired results of the converter topology were verified.

References

[1]. Busse, D., Erdman, J., Kerkman, R. J., Schlegel, D., & Skibinski, G. (1997). Bearing currents and their relationship to PWM drives. IEEE Transactions on Power Electronics, 12(2), 243-252. https://doi.org/10.1109/63.558735

[2]. Casadei, D., Serra, G., & Tani, A. (1998). Reduction of the input current harmonic content in matrix converters under input/output unbalance. IEEE Transactions on Industrial Electronics, 45(3), 401-411. https://doi.org/10. 1109/41.678998

[3]. Casadei, D., Serra, G., Tani, A., & Zarri, L. (2002). Matrix converter modulation strategies: A new general approach based on space-vector representation of the switch state. IEEE Transactions on Industrial Electronics, 49(2), 370-381. https://doi.org/10.1109/41.993270

[4]. Chen, S., Lipo, T. A., & Fitzgerald, D. (1996). Source of induction motor bearing currents caused by PWM inverters. IEEE Transactions on Energy Conversion, 11(1), 25-32. https://doi.org/10.1109/60.486572

[5]. Durán, M. J., Riveros, J. A., Barrero, F., Guzmán, H., & Prieto, J. (2012). Reduction of common-mode voltage in five-phase induction motor drives using predictive control techniques. IEEE Transactions on Industry Applications, 48(6), 2059-2067. https://doi.org/10.1109/TIA.2012.22 26221

[6]. Erdman, J. M., Kerkman, R. J., Schlegel, D. W., & Skibinski, G. L. (1996). Effect of PWM inverters on AC motor bearing currents and shaft voltages. IEEE Transactions on Industry Applications, 32(2), 250-259. https://doi.org/ 10.1109/28.491472

[7]. Hojabri, H., Mokhtari, H., & Chang, L. (2012). Reactive power control of permanent-magnet synchronous wind generator with matrix converter. IEEE Transactions on Power Delivery, 28(2), 575-584. https://doi.org/10.1109/ TPWRD.2012.2229721

[8]. Kolar, J. W., Friedli, T., Rodriguez, J., & Wheeler, P. W. (2011). Review of three-phase PWM AC–AC converter topologies. IEEE Transactions on Industrial Electronics, 58(11), 4988-5006. https://doi.org/10.1109/TIE.2011.2 159353

[9]. Nguyen, H. M., Lee, H. H., & Chun, T. W. (2010). Input power factor compensation algorithms using a new direct-SVM method for matrix converter. IEEE Transactions on Industrial Electronics, 58(1), 232-243. https://doi.org/ 10.1109/TIE.2010.2044736

[10]. Nguyen, H. N., & Lee, H. H. (2014, May). A new SVM method to reduce common-mode voltage in direct matrix converter. In 2014 International Power Electronics Conference (IPEC-Hiroshima 2014-ECCE ASIA) (pp. 1013- 1020). IEEE. https://doi.org/10.1109/IPEC.2014.6869711

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Research Paper

Simulation of PI with FUZZY Logic Controller based on DVR for Mitigate Sag and Swell in Distribution System using SPWM and SVPWM Technique

N. Eashwaramma * , J . Praveen, M. Vijaya Kumar*

, Department of Electrical and Electronics Engineering, JNTUA College of Engineering, Anantapur, Andhra Pradesh, India.

Department of Electrical and Electronics Engineering, Gokaraju Rangaraju Institute of Engineering and Technology, Telangana, India.

Eashwaramma, N., Praveen, J., and Kumar, M. J. (2019). Simulation Design of Automatic Voltage Regulator over Unavailability of Analog Automatic Voltage Regulator. i-manager's Journal on Circuits and Systems , 7(2), 38-53. https://doi.org/10.26634/jcir.7.2.16596

Abstract

This paper proposes Fuzzy Logic controller (FLC) based on Dynamic Voltage Restorer (DVR) Controller along with Directquadrature- zero (dq0) transformation for power quality improvement in a distribution system. Distribution needs protection against the power quality problems like Sag and Swell for providing good supply at the load. Sag and Swell can be compensated by injecting the compensating voltage method using Dynamic Voltage Restorer (DVR). In this research work, DVR is used for the improvement of power quality in distribution systems by using SPWM and SVPWM techniques. Total Harmonic Distribution (THD) and Power Factor (PF) values are compared for both the conditions with and without PI and FLC. The desired compensations are confirmed by the results of the simulation in MATLAB / SIMULINK Software.

References

[1]. Bhaskar, V. K., & Satish, K. (2015). Simualtion of PI with fuzzy logic controller based on DVR as voltage SAG restorer in distribution systems. International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, 7(4), 6257-6267. http://www.ijareeie.com/upload/2015/july/38_8_Simulati on.pdf

[2]. Bhumkittipich, K., & Mithulananthan, N. (2011). Performance enhancement of DVR for mitigating voltage sag/swell using vector control strategy. Energy Procedia, 9, 366-379. https://doi.org/10.1016/j.egypro.2011.09. 040

[3]. Hingorani, N. G. (1995). Introducing custom power. IEEE Spectrum, 32(6), 41-48. https://doi.org/10. 1109/6.387140

[4]. Iltaf, Md., & Reddy, U. V. (2015). A review on application of SVPWM based DVR to enhance the voltage profile in power distribution system. International Journal on Recent and Innovation Trends in Computing and Communication, 126-130.

[5]. Kang, F. S., & Joung, Y. H. (2012). A Cascaded Multilevel Inverter Using Bidirectional H-bridge Modules. Journal of International Conference on Electrical Machines and Systems, 1(4), 448-456. https://doi.org/ 10.11142/jicems.2012.1.4.448

[6]. Kantaria, R. A., Joshi, S. K., & Siddhapura, K. R. (2010, May). A novel technique for mitigation of voltage sag/swell by Dynamic Voltage Restorer (DVR). In 2010 IEEE International Conference on Electro/Information Technology (pp. 1-4). IEEE. https://doi.org/10.1109/ EIT.2010.5612089

[7]. Omar, R., & Rahim, N. A. (2008, December). Modeling and simulation for voltage sags/swells mitigation using dynamic voltage restorer (DVR). In 2008 Australasian Universities Power Engineering Conference (pp. 1-5). IEEE.

[8]. Sivanandam, S. N., Sumathi, S., & Deepa, S. N. (2007). Introduction to Fuzzy Logic using MATLAB. Berlin, Heidelberg: Springer. https://doi.org/10.1007/978-3-540- 35781-0_1

[9]. Srinivas, T. A., Bharathi, K., Wilson, P., & Sridevi, V. (2005). Voltage sag mitigation using solar fed DVR based on fuzzy logic controller. Journal of Chemical and Pharmaceutical Sciences, 8(2), 437-440.

[10]. Suryanarayana, H., & Mishra, M. K. (2008, December). Fuzzy logic based supervision of DC link PI control in a DSTATCOM. In 2008 Annual IEEE India Conference (Vol. 2, pp. 453-458). IEEE. https://doi.org/10. 1109/INDCON.2008.4768766

[11]. Zhang, L., & Bollen, M. H. J. (1998, October). Characteristic of voltage dips (sags) in power systems. In 8^th International Conference on Harmonics and Quality of Power. Proceedings (Cat. No. 98EX227) (Vol. 1, pp. 555- 560). IEEE. https://doi.org/10.1109/ICHQP.1998.759969

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Volume 7 Issue 2 March - May 2019

An Energy-Efficient Adiabatic Logic Based LFSR

M. K. Saini* , N. Pandey**, Nitish***

*-*** Department of Electronics and Communication Engineering, Delhi Technological University (formerly Delhi College of Engineering), Delhi, India.

Saini, M. K., Pandey, N., and Nitish. (2019). An Energy-Efficient Adiabatic Logic based LFSR. i-manager's Journal on Circuits and Systems , 7(2), 1-10. https://doi.org/10.26634/jcir.7.2.16421

Abstract

References

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Design of new Universal Filters with Second Generation Current Conveyor

G. Appala Naidu* , B. T. Krishna**

*-** Department of Electronics and Communication Engineering, Jawaharlal Nehru Technological University, Kakinada, Andhra Pradesh, India.

Naidu, G. A., and Krishna, B. T. (2019). Design of New Universal Filters with Second Generation Current Conveyor. i-manager's Journal on Circuits and Systems , 7(2), 11-20. https://doi.org/10.26634/jcir.7.2.16444

Abstract

References

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Simulation Design of Automatic Voltage Regulator over Unavailability of Analog Automatic Voltage Regulator

Pushan Kumar Datta* , Birajashis Pattnaik**

*-** School of Engineering and Technology, Amity University Kolkata, West Bengal, India.

Datta, P. K., and Pattnaik, B. (2019). Simulation Design of Automatic Voltage Regulator over Unavailability of Analog Automatic Voltage Regulator. i-manager's Journal on Circuits and Systems , 7(2), 21-26. https://doi.org/10.26634/jcir.7.2.16454

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Simulation of Matrix Converter based High Frequency Power Electronic Traction Transformer

Ruksana S. K.*

* Department of Electrical and Electronics Engineering, Vasavi College of Engineering, Hyderabad, Telangana, India.

Ruksana, SK. (2019). Simulation of Matrix Converter based High Frequency Power Electronic Traction Transformer. i-manager's Journal on Circuits and Systems , 7(2), 27-37. https://doi.org/10.26634/jcir.7.2.16683

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Simulation of PI with FUZZY Logic Controller based on DVR for Mitigate Sag and Swell in Distribution System using SPWM and SVPWM Technique

N. Eashwaramma * , J . Praveen**, M. Vijaya Kumar***

*, *** Department of Electrical and Electronics Engineering, JNTUA College of Engineering, Anantapur, Andhra Pradesh, India. ** Department of Electrical and Electronics Engineering, Gokaraju Rangaraju Institute of Engineering and Technology, Telangana, India.

Eashwaramma, N., Praveen, J., and Kumar, M. J. (2019). Simulation Design of Automatic Voltage Regulator over Unavailability of Analog Automatic Voltage Regulator. i-manager's Journal on Circuits and Systems , 7(2), 38-53. https://doi.org/10.26634/jcir.7.2.16596

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M. K. Saini* , N. Pandey, Nitish*

N. Eashwaramma * , J . Praveen, M. Vijaya Kumar*

, Department of Electrical and Electronics Engineering, JNTUA College of Engineering, Anantapur, Andhra Pradesh, India.

Department of Electrical and Electronics Engineering, Gokaraju Rangaraju Institute of Engineering and Technology, Telangana, India.