Loss Distribution Methodology with a Sense Of Emission Dispatch
Low Power Optimization Technique Based Linear Feedback Shift Register
Leakage Power Reduction Using Multi Modal Driven Hierarchical Power Mode Switches
Validation of IOV chain using OVM Technique
Performance of Continuous and Discontinuous Space Vector Pwm Technique for Open End Winding Induction Motor Drive
Electronic Circuit Design for Electromagnetic Compliance through Problem-Based Learning
Trioinformatics: The Innovative and Novel Logic Notation That Defines, Explains, and Expresses the Rational Application of The Law of Trichotomy for Digital Instrumentation and Circuit Design
Design Of a Novel Gated 5T SRAM Cell with Low Power Dissipation in Active and Sleep Mode
A Two Stage Power Optimized Implantable Neural Amplifier Based on Cascoded Structures
An Efficient Hybrid PFSCL based Implementation of Asynchronous Pipeline
This paper provides the second part of an epistemological rational for the novel discipline of “Trioinformatics”. This novel extension of notation in mathematical form is the continuation of the Trioinformatics article that appeared in the imanager Journal on Circuits and Systems.“Neuroengineering Neuromathematics Notation” is the collaborative and comprehensive expression of Trioinformatics as a sequential sequence of inquiry into a precise research analysis methodology. Neuroengineering is an innovative way of explaining the transition from trichotomous logic (Osler, 2015) into trichotomous Triple–I (Osler, 2013d) research questions and associated instrumentation [first introduced in the imanager Journal on Mathematics as a part of the Tri–Squared Test (Osler, 2012a)]. Trioinformatics is an in–depth way of symbolically illustrating the law of trichotomy and a mathematically–grounded rational technique for explaining the ternary nature of electronic circuitry (Osler, 2015). The use of the Trioinformatics also adds value to investigative inquiry through the efficacy of digital instruments and tools via eduscientifically–engineered (Osler, 2013) research designs (Osler, 2015). Additional research into trioinformatics via the use of neuroengineered neuromathematical notation will further advance in–depth investigations into the tripartite aspects of nature and natural phenomena.
In CMOS logic, there is a steady increase in power dissipation which appears in the form of heat to the surrounding environment and affects the reliability. The research efforts are made towards looking into alternatives that go beyond the traditional CMOS technologies, and reversible logic has emerged as a promising choice. In this paper, an optimized and cost efficient realization of reversible Braun multiplier is presented. The design of a 4x4 bit multiplier is developed, designed and presented in this paper as an illustration. The architecture is iterative and hence this can easily be extended to the generalized multiplier of any order. The proposed design of a 4x4 reversible Braun multiplier uses three types of reversible gates namely, PG, HNG and TG gates. The proposed design is compared with an already presented reversible multiplier design showing that the proposed multiplier design is more efficient in terms of quantum cost, constant inputs, garbage outputs and the number of elementary reversible gates.
The fault analysis of sine and linear frequency modulated signals using wavelet transform is proposed in this paper. By using the wavelet transform, the time-frequency localization characteristics and the frequency information of waveform can be integrally obtainable. This approach is more efficient in monitoring the time-varying disturbances when compared with those of fourier transform based methods. In this paper, the result analysis shows how the decomposition of sine and linear frequency modulated signals has been carried out by using wavelet transform.
This paper proposes a Multi Input Single Output (MISO) voltage-mode universal biquadratic filter employing Operational Transresistance Amplifier (OTRA) as anactive element. All five standard filter functions namely Low Pass(LP), High Pass(HP), Band Pass(BP), Band Reject (BR) and All Pass (AP) are realized from the same circuit topology through appropriate input selections. The quality factor of the proposed configuration can be controlled independent of the angular frequency. Internally grounded input terminals of OTRA, render the proposed circuit insensitive to parasitic capacitances. The effect of non-ideal behaviour of the OTRA on the circuit performance is also analysed. Workability of the proposed filter is verified through SPICE simulations using 0.5 μm CMOS process parameters and the simulation results are in close agreement to the theoretical values.
Wind energy is a substantial source of renewable energy which has a potentiality of generating energy on a large scale. Developing this new technology becomes more demanding as variable speed wind turbine is highly efficient than the fixed one. DFIG is widely used in variable speed constant frequency wind energy generation system. These type of machines are controlled with the power converters connected to the rotor, where the controlled power is only a portion, approximately equal to the slip of the stator power. DFIG consists of an asynchronous machine, in which the stator is directly connected to the grid and the rotor is connected to the grid via two power electronic converters (back-to-back converter). This characteristic of DFIG has increased the wind energy penetration, but it is more prone to the electrical grid disturbances. This paper provides a review for the protection and control strategy to enhance the LVRT ability of a wind turbine driven DFIG. In this paper, three LVRT methods for protection of DFIG during low voltage events are explained. The three methods are crowbar, DC chopper, series dynamic resistances, and also two hybrid methods named DC chopper with crowbar and DC chopper with series dynamic resistance respectively
