i-manager Publications

i-manager's Journal on Circuits and Systems (JCIR)

Current Issue Vol. 12 Issue 1

Dynamic Simulation and Sensitivity Analysis of Steam Generation Solar Power Plant
Unified Power Quality Conditioner (UPQC) Research Study on Steady - State Power Flow
Photovoltaic Module Failure Detection using Machine Vision and Lazy Learning Technique
Design and Implementation of Wallace Tree Multiplier and Its Applications in FIR Filter
Review on Obstacle Detection in Solar Panel Cleaning Applications

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Volume 3 Issue 3 June - August 2015

Research Paper

Neuroengineering Neuromathematics Notation: The Novel Trioinformatics System that Defines, Explains, and Expresses the Research Application of the Law of Trichotomy for Digital Instrumentation and Circuit Design

James Edward Osler II*

Faculty member, Department of Curriculum and Instruction, North Carolina Central University (NCCU) School of Education, USA.

Osler, J. E., II. (2015). Neuroengineering Neuromathematics Notation: The Novel Trioinformatics System that Defines, Explains, and Expresses the Research Application of the Law of Trichotomy for Digital Instrumentation and Circuit Design. i-manager’s Journal on Circuits and Systems, 3(3), 1-16. https://doi.org/10.26634/jcir.3.3.4779

Abstract

This paper provides the second part of an epistemological rational for the novel discipline of “Trioinformatics”. This novel extension of notation in mathematical form is the continuation of the Trioinformatics article that appeared in the imanager Journal on Circuits and Systems.“Neuroengineering Neuromathematics Notation” is the collaborative and comprehensive expression of Trioinformatics as a sequential sequence of inquiry into a precise research analysis methodology. Neuroengineering is an innovative way of explaining the transition from trichotomous logic (Osler, 2015) into trichotomous Triple–I (Osler, 2013d) research questions and associated instrumentation [first introduced in the imanager Journal on Mathematics as a part of the Tri–Squared Test (Osler, 2012a)]. Trioinformatics is an in–depth way of symbolically illustrating the law of trichotomy and a mathematically–grounded rational technique for explaining the ternary nature of electronic circuitry (Osler, 2015). The use of the Trioinformatics also adds value to investigative inquiry through the efficacy of digital instruments and tools via eduscientifically–engineered (Osler, 2013) research designs (Osler, 2015). Additional research into trioinformatics via the use of neuroengineered neuromathematical notation will further advance in–depth investigations into the tripartite aspects of nature and natural phenomena.

References

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[2]. Osler, J. E. & Waden, C. (2012b). “Using innovative technical solutions as an intervention for at risk students: A meta–cognitive statistical analysis to determine the impact of ninth grade freshman academies, centers, and center models upon minority student retention and achievement ”. i-manager's Journal on School Educational Technology, Vol.7(3) Sep-Nov 2012, Print ISSN: 0973-0559, E-ISSN : 2230-7125, pp. 11–23.

[3]. Osler, J. E. (2013a). “The psychometrics of educational science: Designing trichotomous inventive investigative instruments for qualitative and quantitative for inquiry”. imanager's Journal on School Educational Technology, Vol.8(3) Dec-Feb 2013, Print ISSN: 0973-2217, E-ISSN : 2230- 7133, pp. 15–22.

[4]. Osler, J. E. (2013b). “The psychological efficacy of education as a science through personal, professional, and contextual inquiry of the affective learning domain”. imanager's Journal on Educational Psychology, Vol.6(4) Feb-Apr 2013, Print ISSN: 0973-0559, E-ISSN : 2230-7125, pp. 36–41.

[5]. Osler, J. E. (2013c). “Proximal positive parallel notation: A novel method of expressing mathematical complements, collaborations, and combinations”. imanager's Journal on Mathematics, Vol.2 (4) Oct-Dec 2013, Print ISSN: 2277-5129, E-ISSN : 2277-5137, pp. 21–31.

[6]. Osler, J. E. (2013). “Transformational research engineering: Research design metrics for in–depth and empowering k–12 teacher professional development”. imanager's Journal on School Educational Technology, Vol.9 (1) Jun-Aug 2013, Print ISSN: 0973-0559, E-ISSN : 2230- 7125, pp. 43–60.

[7]. Osler, J. E. (2015). “Trioinformatics: The innovative and novel logic notation that defines, explains, and expresses the rational application of the law of trichotomy for digital instrumentation and circuit design”. i-manager's Journal on Circuits and Systems, Vol.3(2) Mar-May 2015, Print ISSN: 2321-7502, E-ISSN : 2322-035X, pp. 1–7.

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Research Paper

An Optimized and Cost Efficient Realization of Reversible Braun Multiplier

Neeta Pandey* , Nalin Dadhich, Mohd. Zubair Talha*

* Associate Professor, Department of Electronics and Communication Engineering, Delhi Technological University, India.

_* UG Scholar, Department of Electronics and Communication Engineering, Delhi Technological University, India.

Pandey, N., Dadhich, N., and Talha, M. Z. (2015). An Optimized and Cost Efficient Realization of Reversible Braun Multiplier. i-manager’s Journal on Circuits and Systems, 3(3), 17-24. https://doi.org/10.26634/jcir.3.3.4781

Abstract

In CMOS logic, there is a steady increase in power dissipation which appears in the form of heat to the surrounding environment and affects the reliability. The research efforts are made towards looking into alternatives that go beyond the traditional CMOS technologies, and reversible logic has emerged as a promising choice. In this paper, an optimized and cost efficient realization of reversible Braun multiplier is presented. The design of a 4x4 bit multiplier is developed, designed and presented in this paper as an illustration. The architecture is iterative and hence this can easily be extended to the generalized multiplier of any order. The proposed design of a 4x4 reversible Braun multiplier uses three types of reversible gates namely, PG, HNG and TG gates. The proposed design is compared with an already presented reversible multiplier design showing that the proposed multiplier design is more efficient in terms of quantum cost, constant inputs, garbage outputs and the number of elementary reversible gates.

References

[1]. Bennett, C.H. (1973). “Logical reversibility of computation”. IBM Journal of Research and Development, Vol. 17, No. 6, pp. 525-532.

[2]. Haghparast, M., Jassbi, S.J., Navi, K., & Hashemipour O. (2008). “Design of a novel reversible multiplier circuit using HNG gate in nanotechnology”. World Applied Science J., Vol. 3, pp. 974–978.

[3]. Haghparast, M., Mohammadi, M., Navi, K., & Eshghi, M. (2009). “Optimized reversible multiplier circuit”. Journal of Circuits, Systems and Computers, Vol. 18, No. 2, pp. 311-323.

[4]. Islam, M.S., Rahman, M.M., Begum, Z., & Hafiz, M.Z. (2009). “Low cost quantum realization of reversible multiplier circuit”. Information Technology Journal, Vol. 8, No. 2, pp. 208-213.

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[7]. McGregor, Patrick, J., & Lee, R. B. (2001). “Architectural Enhancements for Fast sub word Permutations with Repetitions in Cryptographic Applications”. Proceedings of IEEE ICCD, pp. 453-461.

[8]. Moallem, P., & Ehsanpour, M. (2013). “A Novel Design of Reversible Multiplier Circuit”. International Journal of Engineering, Vol. 26, No. 2, pp. 577-586.

[9]. Moghadam, M.Z., & Navi, K. (2012). “Ultra-areaefficient reversible multiplier”. Microelectronics Journal, Vol. 43, No. 6, pp. 377–385.

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Research Paper

Fault Analysis of Stationary and LFM Signals Using Wavelet Transform

A. Naga Jyothi* , M. Rajeswari**

* Associate Professor, Department of Electronics and Communication Engineering, Vignan's Institute of Information Technology, Visakhapatnam, Andhar Pradesh, India.

** Assistant Professor, Department of Electronics and Communication Engineering, Vignan's Institute of Information Technology, Visakhapatnam, Andhar Pradesh,India.

NagaJyothi, A., and Rajeswari, M. (2015). Fault Analysis of Stationary and LFM Signals Using Wavelet Transform. i-manager’s Journal on Circuits and Systems, 3(3), 25-29. https://doi.org/10.26634/jcir.3.3.4782

Abstract

The fault analysis of sine and linear frequency modulated signals using wavelet transform is proposed in this paper. By using the wavelet transform, the time-frequency localization characteristics and the frequency information of waveform can be integrally obtainable. This approach is more efficient in monitoring the time-varying disturbances when compared with those of fourier transform based methods. In this paper, the result analysis shows how the decomposition of sine and linear frequency modulated signals has been carried out by using wavelet transform.

References

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Research Paper

Multi Input Single Output Biquadratic Universal Filter using OTRA

Romita Mullick* , Neeta Pandey, Rajeshwari Pandey*

* PG Scholar, Department of Electrical Engineering, University of Pennsylvania.

-* Associate Professor, Department of Electronics and Communication Engineering, Delhi Technological University, Delhi, India.

Mullick, R., Pandey, N., and Pandey, R. (2015). Multi Input Single Output Biquadratic Universal Filter using OTRA. i-manager’s Journal on Circuits and Systems, 3(3), 30-37. https://doi.org/10.26634/jcir.3.3.4783

Abstract

This paper proposes a Multi Input Single Output (MISO) voltage-mode universal biquadratic filter employing Operational Transresistance Amplifier (OTRA) as anactive element. All five standard filter functions namely Low Pass(LP), High Pass(HP), Band Pass(BP), Band Reject (BR) and All Pass (AP) are realized from the same circuit topology through appropriate input selections. The quality factor of the proposed configuration can be controlled independent of the angular frequency. Internally grounded input terminals of OTRA, render the proposed circuit insensitive to parasitic capacitances. The effect of non-ideal behaviour of the OTRA on the circuit performance is also analysed. Workability of the proposed filter is verified through SPICE simulations using 0.5 μm CMOS process parameters and the simulation results are in close agreement to the theoretical values.

References

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Review Paper

A Review on Control Strategy of Wind Turbine With DFIG For Low Voltage Ride Through Capability

Mitali Gupta* , Ashok Kumar Pandey**

* PG Scholar, Department of Electrical Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India.

** Associate Professor, Department of Electrical Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India.

Gupta, M., and Pandey, A. K. (2015). A Review on Control Strategy of Wind Turbine With DFIG For Low Voltage Ride Through Capability. i-manager’s Journal on Circuits and Systems, 3(3), 38-44. https://doi.org/10.26634/jcir.3.3.4784

Abstract

Wind energy is a substantial source of renewable energy which has a potentiality of generating energy on a large scale. Developing this new technology becomes more demanding as variable speed wind turbine is highly efficient than the fixed one. DFIG is widely used in variable speed constant frequency wind energy generation system. These type of machines are controlled with the power converters connected to the rotor, where the controlled power is only a portion, approximately equal to the slip of the stator power. DFIG consists of an asynchronous machine, in which the stator is directly connected to the grid and the rotor is connected to the grid via two power electronic converters (back-to-back converter). This characteristic of DFIG has increased the wind energy penetration, but it is more prone to the electrical grid disturbances. This paper provides a review for the protection and control strategy to enhance the LVRT ability of a wind turbine driven DFIG. In this paper, three LVRT methods for protection of DFIG during low voltage events are explained. The three methods are crowbar, DC chopper, series dynamic resistances, and also two hybrid methods named DC chopper with crowbar and DC chopper with series dynamic resistance respectively

References

[1]. Millais C, and Teske S., (2004). “Wind force 12: a blueprint to achieve 12% of the world's electricity from wind power by 2020”. Green peace Europe, Wind Energy Association 2004.

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[5]. D. Xiang, L. Ran, P. J. Tanver, and S. Yang, (2006). “Control of a doubly fed induction generator in a wind turbine during grid fault ride-through”. IEEE Trans. Energy Convers., Vol. 21, No. 3, pp. 652-662.

[6]. M. Rathi and N. Mohan, (2005). “ A novel robust low voltage and fault ride through for wind turbine application operating in weal grids”. Proc. IEEE Industrial Electronics Society Conf., pp. 6-10

[7]. A. Hansen and G. Michalke, (2007). “Fault ride-through capability of DFIG wind turbines”. Renew. Energy, Vol. 32, No. 9, pp. 1594-1610.

[8]. J. Lopez, P. Sanchis, X Roboam, and L. Marroyo, (2007). “Dynamic behaviour of the doubly fed induction generator during three phase voltage dips”. IEEE Trans. Energy Convers., Vol. 22, No. 3, pp. 709-717.

[9]. L. Xu and P. Cartwright, (2007). “Direct active and reactive power control of DFIG for wind energy generations”. IEEE Trans. Energy Convers., Vol. 21, No. 3, pp. 750-758.

[10]. M. Rahimi and M. Parniani, (2010). “Transient performance improvement of wind turbines with doubly fed induction generators using nonlinear control strategy”. IEEE Trans. Energy Convers., Vol. 25, No. 2, pp. 514-525.

[11]. F. K. A. Lima, A. Luna, P. Rodriguez, E. H. Watanabe, and F. Blaabjerg, (2010). “Rotor voltage dynamics in the doubly fed induction generator during grid faults”. IEEE Trans. Power Electron., Vol. 25, No. 1, pp. 118-130.

[12]. J. Liang, W. Qiao, and R. G. Harley, (2010). “Feedforward transient current control for low-voltage ride-through enhancement of DFIG wind turbines”. IEEE Trans. Energy Convers., Vol. 25, No. 3, pp. 836-843.

[13]. A. El-Sattar, et al., (2008). “Dynamic Response of Doubly Fed Induction Generator Variable Speed Wind Turbine Under Fault”. Electric Power System Research, Vol. 78, pp. 1240-1246.

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Volume 3 Issue 3 June - August 2015

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Fault Analysis of Stationary and LFM Signals Using Wavelet Transform

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Multi Input Single Output Biquadratic Universal Filter using OTRA

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A Review on Control Strategy of Wind Turbine With DFIG For Low Voltage Ride Through Capability

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* PG Scholar, Department of Electrical Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India. ** Associate Professor, Department of Electrical Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India.

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Neeta Pandey* , Nalin Dadhich, Mohd. Zubair Talha*

* Associate Professor, Department of Electronics and Communication Engineering, Delhi Technological University, India.

_* UG Scholar, Department of Electronics and Communication Engineering, Delhi Technological University, India.

Romita Mullick* , Neeta Pandey, Rajeshwari Pandey*

* PG Scholar, Department of Electrical Engineering, University of Pennsylvania.

-* Associate Professor, Department of Electronics and Communication Engineering, Delhi Technological University, Delhi, India.

* PG Scholar, Department of Electrical Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India.

** Associate Professor, Department of Electrical Engineering, Madan Mohan Malaviya University of Technology, Gorakhpur, India.