i-manager's Journal on Electrical Engineering (JEE)


Volume 15 Issue 4 April - June 2022

Research Paper

Reduction of Common Mode Voltage for Cascaded 3-Level Inverter using SVPWM

R. Linga Swamy* , R. Somanatham**
*-** Department of Electrical Engineering, University College of Engineering, Osmania University, Hyderabad, Telangana, India.
Swamy, R. L., and Somanatham, R. (2022). Reduction of Common Mode Voltage for Cascaded 3-Level Inverter using SVPWM. i-manager’s Journal on Electrical Engineering, 15(4), 1-11. https://doi.org/10.26634/jee.15.4.18626

Abstract

The common mode voltage (CMV) generated by multilevel inverters can be reduced. This paper presents a Spacevector pulse width modulation (SVPWM) approach for cascaded 3-level inverters to reduce common mode voltage. Conventional 3-level pulse width modulated (PWM) inverters are widely known for producing high-frequency commonmode voltages with high dv/dt. Motor shaft voltages and bearing currents can be caused by common mode voltages. In this work, to reduce common mode voltage, partial CMV elimination technique is used. In this method the redundant states of 3-level inverter having CMV less than or equal to Vdc/6 are only used and the redundant states having CMV greater than Vdc/6 are avoided by implementing SVPWM, where Vdc is the input DC voltage of inverter. A simulation of an SVM technique to reduce common mode voltage is implemented. Bearing voltages, bearing currents and total harmonic distortion (THD) are evaluated in the performance analysis. The results will prove the reduction of CMV with the proposed technique compared to conventional SVPWM.

Research Paper

Modelling, Performance Assessment and Transient Analysis of Brushless DC Motor by Controller Techniques

Divyanshu Kumar* , Shivam**, Khadim Moin Siddiqui***, Kalpana Kureel****
*-**** Department of Electrical and Electronics Engineering, SRMCEM, Lucknow, India.
Kumar, D., Shivam, Siddiqui, K. M., and Kureel, K. (2022). Modelling, Performance Assessment and Transient Analysis of Brushless DC Motor by Controller Techniques. i-manager’s Journal on Electrical Engineering, 15(4), 12-19. https://doi.org/10.26634/jee.15.4.18688

Abstract

This paper investigates steady state and transients' performance of Brushless Direct Current Motor (BLDC) motor and collates the performance of Proportional Integral (PI) and Proportional Integral Derivative (PID) Controller. Speed and torque behavior is most valuable nowadays for home appliance and other applications. The torque in motor is produced with effect of magnetic field and current. Magnetic field is generated in motor by the strong permanent magnet, and motor current depends upon voltage control and Eb, which is done by field and speed motor. In order to obtain required torque and speed at a particular load, current required must be controlled. The transient or dynamic response analysis is done with transfer function of BLDC motor obtained by the Laplace transform of equivalent circuit equation. The trapezoidal type BLDC machine is controlled using 3-phase Inverter Bridge. The commutation sequence is done with hall sensor and gate pulses. The simulation work is done in MATLAB/ Simulink software and mathematical model is evaluated. The analysis is done to know the performance of how quickly the transient reduces and gives smooth operation for various applications.

Research Paper

Power Quality Improvement using Dynamic Voltage Restorer (DVR)

Anil Agrahari* , Shruti Sagar Shukla**, Shivam Shukla***, Shaurya Singh****
*-**** Department of Electrical Engineering, Shri Ramswaroop College of Engineering and Management, Lucknow, Uttar Pradesh, India.
Agrahari, A., Shukla, S. S., Shukla, S., and Singh, S. (2022). Power Quality Improvement using Dynamic Voltage Restorer (DVR). i-manager’s Journal on Electrical Engineering, 15(4), 20-26. https://doi.org/10.26634/jee.15.4.18700

Abstract

This paper presents power quality issues, and ways to resolve these problems. There are a number of custom power devices which are used to resolve these issues. The Dynamic Voltage Restorer (DVR) is a special device that is used nowadays. To detect the voltage drop system, park transform is utilized and applied to the voltage regulator as a control system function, that detects the voltage amplitude at the sensitive load constantly in DVR (using a three-phase voltage source inverter with voltage loop control (PI)) (Martiningsih & Prakoso, 2018). This paper is about basic working of DVR with simulation results. MATLAB is used in this work, and confirmed the convincingness of the DVR.

Research Paper

Nine-Level Cascaded Multilevel Inverter for PV Systems

Jammu Akhil* , Gajula Vamshi Krishna**, Guntuka Yashwanth***, Dasari Mounika****
*-**** Department of Electrical and Electronics Engineering, Vignana Bharathi Institute of Technology, Hyderabad, Telangana, India.
Akhil, J., Krishna, G. V., Yashwanth, G., and Mounika, D. (2022). Nine-Level Cascaded Multilevel Inverter for PV Systems. i-manager’s Journal on Electrical Engineering, 15(4), 27-37. https://doi.org/10.26634/jee.15.4.18840

Abstract

This paper presents an improved Cascaded Multilevel Inverter (CMLI) based on a highly efficient and reliable configuration for the minimization of the leakage current. The suggested technique also exhibits minimal switching and conduction losses in addition to having fewer switches. The proposed topology using the specified, high-frequency voltage is decreased by the Pulse Width Modulation (PWM) approach, voltage changes at the terminal and commonmode levels. Keeping away from high-frequency voltage changes results in the reduction in leakage current and a reduction in the size EMI filter. In addition, the continuation of the CMLI and the PWM method for 2m+1 levels is also shown, where m denotes quantity, solar energy, photovoltaic (PV) sources. The suggested PWM to cover all 2m+1, only one carrier wave is required levels of performance. Total Harmonic Distortion (THD) is the planned CMLI network current that meets the specifications of the Institute of Electrical and Electronics Engineers (IEEE) 1547 standard. The paper also includes a comparison of the proposed CMLI topology and the existing multilevel inverter (MLI) PV topology. The article presents the full features of the common-mode and photovoltaic voltage terminal analysis proposed by CMLI using switching function ideas, simulations, and experimental results.

Research Paper

On-Grid Solar Inverter: A Proposal

Satyavir Singh* , Vivek Mishra**, Sudhanshu Choudhary***, Sudheer Kumar Verma****
*-**** Department of Electrical Engineering, Shri Ramswaroop College of Engineering and Management, Lucknow, India.
Singh, S., Mishra, V., Choudhary, S., and Verma, S. K. (2022). On-Grid Solar Inverter: A Proposal. i-manager’s Journal on Electrical Engineering, 15(4), 38-42. https://doi.org/10.26634/jee.15.4.18807

Abstract

In the developing countries, homes experience power outages, especially in rural areas when there are voltage fluctuations in the distribution network, as the home installation is mostly off-grid. To solve this problem, the authors tried to install solar PV system with on-grid installation. This will eliminate electricity outrages during voltage fluctuation supply in the supply lines. Currently in India, most houses have one way power supply from distribution lines, while this paper proposes multiple power sources through solar panels and wind power. The proposal includes a microgrid which will store and distribute electricity from main, solar and wind energy. This proposed solution is intended to harvest unused natural energy and utilize the conventional energy economically and rationally.