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i-manager's Journal on Digital Signal Processing (JDP)

Current Issue Vol. 12 Issue 1

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Volume 7 Issue 1 January - March 2019

Research Paper

Airbase Detection and Airship Recognition in High Spatial Resolution Remote Sensing Images

B. Bersi Beulah*

* Department of Electronics and Communication Engineering, PET Engineering College, Tirunelveli, Tamil Nadu, India.

Beulah, B. B. (2019). Airbase Detection and Airship Recognition in High Spatial Resolution Remote Sensing Images. i-manager’s Journal on Digital Signal Processing, 7(1),1-11. https://doi.org/10.26634/jdp.7.1.16264

Abstract

In the proposed work, two-layer visual saliency analysis model and Support Vector Machines (SVMs) are used for Airport detection and Aircraft Recognition. In the First Layer Saliency (FLS) model, a spatial-frequency visual saliency analysis algorithm has been introduced that is based on a CIE Lab color space to reduce the interference of backgrounds and efficiently detect well-defined airport regions in broad-area remote-sensing images. In the second layer saliency model, a saliency analysis strategy is proposed that is based on an edge feature preserving wavelet transform and highfrequency wavelet coefficient reconstruction to complete the pre- extraction of aircraft candidates from airport regions that are detected by the FLS and as many aircraft candidates are crudely extracted as possible for additional classification in detected airport regions. Then, feature descriptors are utilized based on a dense SIFT and Hu moment to accurately describe these features of the aircraft candidates. Finally, these object features are inputted to the SVM, and the aircrafts are recognized. The experimental results indicate that the proposed method not only reliably and effectively detects targets in high-resolution broad-area remote- sensing images, but also produces more robust results in complex scenes.

References

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[2]. Aggarwal, N., & Karl, W. C. (2006). Line detection in images through regularized Hough transform. IEEE Transactions on Image Processing, 15(3), 582-591. https://doi.org/10.1109/TIP.2005.863021

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[5]. Hou, X., & Zhang, L. (2007, June). Saliency detection: A spectral residual approach. In 2007 IEEE Conference on Computer Vision and Pattern Recognition (pp. 1-8). IEEE. https://doi.org/10.1109/CVPR.2007.383267

[6]. Imamoglu, N., Lin, W., & Fang, Y. (2012). A saliency detection model using low-level features based on wavelet transform. IEEE Transactions on Multimedia, 15(1), 96-105. https://doi.org/10.1109/TMM.2012. 2225034

[7]. Itti, L., Koch, C., & Niebur, E. (1998). A model of saliency-based visual attention for rapid scene analysis. IEEE Transactions on Pattern Analysis & Machine Intelligence, (11), 1254-1259. https://doi.ieeecomputer society.org/10.1109/34.730558

[8]. Koch, C., & Ullman, S. (1987). Shifts in selective visual attention: towards the underlying neural circuitry. In Matters of intelligence (pp. 115-141). Springer, Dordrecht. https://doi.org/10.1007/978-94-009-3833-5_5

[9]. Liu, T., Yuan, Z., Sun, J., Wang, J., Zheng, N., Tang, X., & Shum, H. Y. (2010). Learning to detect a salient object. IEEE Transactions on Pattern Analysis and Machine Intelligence, 33(2), 353-367. https://doi.org/10.1109/ TPAMI.2010.70

[10]. Tao, C., Tan, Y., Cai, H., & Tian, J. (2010). Airport detection from large IKONOS images using clustered SIFT keypoints and region information. IEEE Geoscience and Remote Sensing Letters, 8(1), 128-132.

[11]. Wang, X., Lv, Q., Wang, B., & Zhang, L. (2013). Airport detection in remote sensing images: A method based on saliency map. Cognitive Neurodynamics, 7(2), 143-154. https://doi.org/10.1007/s11571-012-9223-z

[12]. Xiong, W., Zhong, J., & Zhou, Y. (2012, May). Automatic recognition of airfield runways based on Radon transform and hypothesis testing in SAR images. In Proceedings of 2012 5^th Global Symposium on Millimeter- Waves (pp. 462-465). IEEE. https://doi.org/10.1109/ GSMM.2012.6314098

[13]. Zhang, L., Li, A., Zhang, Z., & Yang, K. (2016). Global and local saliency analysis for the extraction of residential areas in high-spatial-resolution remote sensing image. IEEE Transactions on Geoscience and Remote Sensing, 54(7), 3750-3763. https://doi.org/10.1109/TGRS.2016. 2527044

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Research Paper

Design of Y Shaped 2x1 Encoder using Two Dimensional Photonic Crystals

K. Latha* , R. Arunkumar, S. Robinson*

*-*** Department of Electronics and Communication Engineering, Mount Zion College of Engineering and Technology, Pudukkottai, Tamil Nadu, India.

Latha, K., Arunkumar, R., & Robinson, S. (2019). Design of Y Shaped 2x1 Encoder using Two Dimensional Photonic Crystals. i-manager’s Journal on Digital Signal Processing, 7(1), 12-19. https://doi.org/10.26634/jdp.7.1.16260

Abstract

In this paper, Y shaped 2x1 encoder design is based on two dimensional photonic crystals and this encoder design is constructed by point and line defects of photonic crystal which is providing high contrast ratio and reduced power loss for the proposed design. The performances field distributions are analyzed finite difference time domain and the band structures are evaluated using the plane wave expansion method. The proposed 2x1 encoder operated at 1520 nm provides contrast ratio of 28 dB, response time of 3.9 ps, and bit rate of around 0.25 Tbps. So, it is suitable for photonic integrated circuits.

References

[1]. Alipour-Banaei, H., Mehdizadeh, F., Serajmohammadi, S., & Hassangholizadeh-Kashtiban, M. (2015). A 2* 4 all optical decoder switch based on photonic crystal ring resonators. Journal of Modern Optics, 62(6), 430-434. https://doi.org/10.1080/ 09500340.2014.957743

[2]. Belhadj, W., Saidani, N., & Abdelmalek, F. (2018). Alloptical logic gates based on coupled heterostructure waveguides in two dimensional photonic crystals. Optik, 168, 237-243. https://doi.org/10.1016/j.ijleo.2018.04.051

[3]. Christina, X. S., & Kabilan, A. P. (2012). Design of optical logic gates using self-collimated beams in 2D photonic crystal. Photonic Sensors, 2(2), 173-179. https://doi.org/10.1007/s13320-012-0054-7

[4]. Gholamnejad, S., & Zavvari, M. (2017). Design and analysis of all-optical 4–2 binary encoder based on photonic crystal. Optical and Quantum Electronics, 49(9), 302. https://doi.org/10.1007/s11082-017-1144-y

[5]. Goudarzi, K., Mir, A., Chaharmahali, I., & Goudarzi, D. (2016). All-optical XOR and OR logic gates based on line and point defects in 2-D photonic crystal. Optics & Laser Technology, 78, 139-142. https://doi.org/10.1016/j. optlastec.2015.10.013

[6]. Haq Shaik, E., & Rangaswamy, N. (2017). Multi-mode interference-based photonic crystal logic gates with simple structure and improved contrast ratio. Photonic Network Communications, 34 (1), 140-148. https://doi.org/10.1007/s11107-016-0683-7

[7]. Hassangholizadeh-Kashtiban, M., Sabbaghi- Nadooshan, R., & Alipour-Banaei, H. (2015). A novel all optical reversible 4×2 encoder based on photonic crystals. Optik, 126(20), 2368-2372. https://doi.org/ 10.1016/j.ijleo.2015.05.140

[8]. Hussein, H. M., Ali, T. A., & Rafat, N. H. (2018). New designs of a complete set of photonic crystals logic gates. Optics Communications, 411, 175-181. https://doi.org/10.1016/j.optcom.2017.11.043

[9]. Jayabarathan, J. K., Subhalakshmi, G., & Robinson, S. (2018). Performance evaluation of two dimensional photonic crystal based all optical AND/OR logic gates. Journal of Optical Communications. https://doi.org/ 10.1515/joc-2018-0105

[10]. Mehdizadeh, F., Soroosh, M., & Alipour-Banaei, H. (2016). Proposal for 4-to-2 optical encoder based on photonic crystals. IET Optoelectronics, 11(1), 29-35. https://doi.org/10.1049/iet-opt.2016.0022

[11]. Moniem, T. A. (2016). All-optical digital 4× 2 encoder based on 2D photonic crystal ring resonators. Journal of Modern Optics, 63(8), 735-741. https://doi.org/10.1080/ 09500340.2015.1094580

[12]. Naghizade, S., & Khoshsima, H. (2018). Low input power an all optical 4× 2 encoder based on triangular lattice shape photonic crystal. Journal of Optical Communications. https://doi.org/10.1515/joc-2018- 0019

[13]. Naghizade, S., Mohammadi, S., & Khoshsima, H. (2018). Design and simulation of an all optical 8 to 3 binary encoder based on optimized photonic crystal OR gates. Journal of Optical Communications. https://doi.org/10.1515/joc-2018-0034

[14]. Ouahab, I., & Naoum, R. (2016). A novel all optical 4× 2 encoder switch based on photonic crystal ring resonators. Optik, 127(19), 7835-7841. https://doi.org/ 10.1016/j.ijleo.2016.05.080

[15]. Pirzadi, M., Mir, A., & Bodaghi, D. (2016). Realization of ultra-accurate and compact all-optical photonic crystal OR logic gate. IEEE Photonics Technology Letters, 28(21), 2387-2390. https://doi.org/10.1109/LPT.2016. 2596580

[16]. Rani, P., Kalra, Y., & Sinha, R. K. (2015). Design of all optical logic gates in photonic crystal waveguides. Optik, 126(9-10), 950-955. https://doi.org/10.1016/j.ijleo. 2015.03.003

[17]. Saidani, N., Belhadj, W., & Abdel Malek, F. (2015). Novel all-optical logic gates based photonic crystal waveguide using self imaging phenomena. Optical and Quantum Electronics, 47(7), 1829-1846. https://doi.org/ 10.1007/s11082-014-0047-4

[18]. Salimzadeh, A., & Alipour-Banaei, H. (2018). An all optical 8 to 3 encoder based on photonic crystal ORgate ring resonators. Optics Communications, 410, 793- 798. https://doi.org/10.1016/j.optcom.2017.11.036

[19]. Salmanpour, A., Mohammadnejad, S., & Bahrami, A. (2015). Photonic crystal logic gates: An overview. Optical and Quantum Electronics, 47(7), 2249-2275. https://doi.org/10.1007/s11082-014-0102-1

[20]. Seif-Dargahi, H. (2018). Ultra-f

ast all-optical encoder using photonic crystal-based ring resonators. Photonic Network Communications, 36 (2), 272-277. https://doi.org/10.1007/s11107-018-0779-3

[21]. Shaik, E. H., & Rangaswamy, N. (2018). Realization of XNOR logic function with all-optical high contrast XOR and NOT gates. Opto-Electronics Review, 26(1), 63-72. https://doi.org/10.1016/j.opelre.2018.01.003

[22]. Wu, C. J., Liu, C. P., & Ouyang, Z. (2012). Compact and low-power optical logic NOT gate based on photonic crystal waveguides without optical amplifiers and nonlinear materials. Applied Optics, 51(5), 680-685. https://doi.org/10.1364/AO.51.000680

[23]. Yang, Y. P., Lin, K. C., Yang, I. C., Lee, K. Y., Lee, W. Y., & Tsai, Y. T. (2017). All-optical photonic-crystal encoder capable of operating at multiple wavelengths. Optik, 142, 354-359. https://doi.org/10.1016/j.ijleo.2017.05.067

[24]. Younis, R. M., Areed, N. F., & Obayya, S. S. (2014). Fully integrated AND and OR optical logic gates. IEEE Photonics Technology Letters, 26(19), 1900-1903. https://doi.org/10.1109/LPT.2014.2340435

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Research Paper

Speed Enhancement of Modified Booths Encoding Algorithm Using Verilog HDL

Gopi Chand Naguboina* , T. Sravya**

* Department of Electronics and Communication Engineering, MVGR College of Engineering (A), Vizianagaram, Andhra Pradesh, India.

** Department of Electrical and Electronics Engineering, Lendi Institute of Engineering and Technology (A), Vizianagaram, Andhra Pradesh, India.

Naguboina, G. C., & Sravya. T. (2019). Speed Enhancement of Modified Booths Encoding Algorithm Using Verilog HDL. i-manager’s Journal on Digital Signal Processing, 7(1), 20-27. https://doi.org/10.26634/jdp.7.1.16434

Abstract

This paper presents the design and implementation of Modified Booths encoding algorithm with enhanced speed. Multiplication is the most commonly used operation in every step of arithmetic. The speed of multiplier determines the speed of processor. So, there is a need for high speed multiplier. Adders play a dominant role in arithmetic addition of partial products. Increase in the speed of any arithmetic operation results in the increase of speed of overall operation of multiplier. So the main focus in this paper is to increase the speed of adder in turn increasing the speed of multiplication process. An algorithm is proposed using Modified Booths algorithm, Wallace tree structure, and Kogge-Stone adder design. MBE reduces the number of partial products and has least latency compared to other multiplier algorithms. Wallace tree structure increases the speed of accumulation of partial products. A Kogge-Stone adder design is used in the multiplier design, which yields to reduced delay and area. The proposed Modified Booth Multiplier design shows better performance compared to that of the conventional method using Kogge-Stone Adder and has advantages of reduced area overhead and critical path delay. The proposed design has been synthesized using Xilinx ISE 14.2 design tool using Verilog HDL.

References

[1]. Bano, N. (2012). VLSI Design of low power booth multiplier. International Journal of Scientific & Engineering Research, 3(2), 2-4. https://doi.org/10.1109/ TC.2006.156

[2]. Kang, J. Y., & Gaudiot, J. L. (2006). A simple high-speed multiplier design. IEEE Transactions on Computers, 55(10), 1253-1258. https://doi.org/10.1109/TC.2006.156

[3]. Kaur, S., & Bansal, M. G. (2011). FPGA implementation of efficient modified booth wallace multiplier (Doctoral dissertation, Thapar University).

[4]. Mitra, A., & Bakshi, A. (2015, May). Performance Improvement of a Modified Carry Select Adder. In 24^th IRF International Conference (pp. 69-77).

[5]. Parmar, S., & Singh, K. P. (2013, February). Design of rd high speed hybrid carry select adder. In 2013 3^rdIEEE International Advance Computing Conference (IACC) (pp. 1656-1663). IEEE. https://doi.org/10.1109/IAdCC. 2013.6514477

[6]. Rajput, R. P., & Swamy, M. S. (2012, March). High speed Modified Booth Encoder multiplier for signed and unsigned numbers. In 2012 UKSim 14^th International Conference on Computer Modelling and Simulation (pp. 649-654). IEEE. https://doi.org/10.1109/UKSim.2012.99

[7]. Saini, J., Agarwal, S., & Kansal, A. (2015, March). Performance, analysis and comparison of digital adders. In 2015 International Conference on Advances in Computer Engineering and Applications (pp. 80-83). IEEE. https://doi.org/10.1109/ICACEA.2015.7164650

[8]. Saxena, P., Purohit, U., & Joshi, P. (2013). Analysis of low power, area-efficient and high speed fast adder. International Journal of Advanced Research in Computer and Communication Engineering, 2(9), 3705-3710.

[9]. Seo, Y. H., & Kim, D. W. (2009). A new VLSI architecture of parallel multiplier–accumulator based on Radix-2 modified Booth algorithm. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 18(2), 201-208. https://doi.org/10.1109/TVLSI.2008.2009113

[10]. Trivedi, M. J., Nayak, V. M., & Vayada, M. G. (2015). Implementation of parallel multiplier using advanced modified booth encoding algorithm. International Journal of Engineering Development and Research, 3(2), 622-628.

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Research Paper

Developing Sidelobe Reduction Techniques using P4 Code for Pulse Compression Radar Applications

CH. Ramya Sree* , B. Kiranmai, G. H. Sindhuja*, A. V. Sai Kumar****

*_***** Department of Electronics and Communication Engineering, Lendi Institute of Engineering and Technology, Vizianagaram, Andhra Pradesh, India.

Sree, R., Kiranmani, B., Sindhuja, G. H., & Kumar, A. V. S. (2019). *-**** Department of Electronics and Communication Engineering, Lendi Institute of Engineering and Technology (Autonomous), Vizianagaram, Andhra Pradesh, India. i-manager’s Journal on Digital Signal Processing, 7(1), 28-32. https://doi.org/10.26634/jdp.7.1.16348

Abstract

Pulse compression is a signal processing technique mainly used to increase the range resolution and detection capabilities of the Radar. This paper presents a novel technique for the 'reduction of the side-lobes in the Pulse Compression (PC)' for the Radar systems. This Pulse Compression increases the range resolution and signal to noise ratio. In this paper, the polyphase codes have been considered because it has low side lobes and are better Doppler tolerant and better tolerant to pre-compression band limiting. The peak sidelobe ratio and signal noise reduction loss are computed using P4 polyphase codes. This result is compared with various weighting techniques applied on the output of Woo filter in order to suppress the sidelobes. This proposed PC technique is implemented by shifting the input P4 polyphase codes and multiplied with reference signal. This technique produces certain improvement in Peak Sidelobe Ratio and Signal Noise Reduction Loss (SNR Loss).

References

[1]. Kretschmer, F. F., & Welch, L. R. (2000, May). Sidelobe reduction techniques for polyphase pulse compression codes. In Record of the IEEE 2000 International Radar Conference [Cat. No. 00CH37037] (pp. 416-421). IEEE. https://doi.org/10.1109/RADAR.2000.851870

[2]. Kumari, U. M., Rajarajeswari, K., & Krishna, M. K. (2005). Low sidelobe pattern using Woo filter concepts. AEU- International Journal of Electronics and Communications, 59(8), 499-501. https://doi.org/ 10.1016/j.aeue.2004.11.045

[3]. Lee, W. K. (2006). A pair of asymmetric weighting receivers and polyphase codes for efficient aperiodic correlations. IEEE Communications Letters, 10(5), 387- 389. https://doi.org/10.1109/LCOMM.2006.1633332

[4]. Lee, W. K., & Griffiths, H. D. (2004). Development of modified polyphase P codes with optimum sidelobe characteristics. IEE Proceedings-Radar, Sonar and Navigation, 151(4), 210-220. https://doi.org/10.1049/ip-rsn: 20040744

[5]. Lewis, B. L. (1993). Range-time-sidelobe reduction technique for FM-derived polyphase PC codes. IEEE Transactions on Aerospace and Electronic Systems, 29(3), 834-840. https://doi.org/10.1109/7.220934

[6]. Lewis, B. L., & Kretschmer, F. F. (1981). A new class of polyphase pulse compression codes and techniques. IEEE Transactions on Aerospace and Electronic Systems, (3), 364-372. https://doi.org/10.1109/TAES.1981.309063

[7]. Lewis, B. L., & Kretschmer, F. F. (1982). Linear frequency modulation derived polyphase pulse compression codes. IEEE Transactions on Aerospace and Electronic Systems, (5), 637-641. https://doi.org/10.1109/TAES.1982. 309276

[8]. Sarkar, I., & Fam, A. T. (2008). Multiplicative mismatched filters for sidelobe suppression in Barker codes. IEEE Transactions on Aerospace and Electronic Systems, 44(1), 349-359. https://doi.org/10.1109/TAES. 2008.4517009

[9]. Skolnik, M. I. (1981). Introduction to Radar Systems (2^ndEd.). New York: McGraw Hill.

[10]. Vizitiu, I. C. (2014). Some aspects of sidelobe reduction in pulse compression radars using NLFM signal processing. Progress In Electromagnetics Research, 47, 119-129. https://doi.org/10.1109/TAES.1981.309063

[11]. Zakeri, B. G., Zahabi, M. R., & Alighale, S. (2012). Sidelobes level improvement by using a new scheme used in microwave pulse compression radars. Progress In Electromagnetics Research, 30, 81-90. https://doi.org/ 10.2528/PIERL12011102

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Research Paper

FPGA Based Implementation of Median Filter using Compare and Exchange Unit

Boni Srinu * , Srinu Bevara, Nagendra Kumar M.*

* Department of Electronics and Communication Engineering, Lendi Institute of Engineering and Technology (A), Andhra Pradesh, India.

Department of Information Technology, Gayatri Vidya Parishad College of Engineering (A), Visakhapatnam, Andhra Pradesh, India.

* Department of Electronics and Communication Engineering, MVGR College of Engineering (A), Vizianagaram, Andhra Pradesh, India.

Srinu, B., Bevara, S., & Kumar, N. M. (2019). FPGA Based Implementation of Median Filter using Compare and Exchange Unit i-manager’s Journal on Digital Signal Processing, 7(1),33-38. https://doi.org/10.26634/jdp.7.1.16435

Abstract

Over the past few years, so many new solutions are gaining popularity in the software industry. All these solutions require a fast and parallel data manipulation. An attempt has been made to design median filter with high throughput and good latency to suppress the impulse based noise on real time signal and image processing applications. It is partially affected by the median filter and its bias of the input stream is directly above the average of mathematical analysis. An efficient VLSI suitable hardware implementation of a median filter is presented, that uses compare and exchange unit. The proposed hardware structure reduces the hardware requirements and has a faster processing speed, when compared with some other existing techniques. The input numbers or streams are used to construct an algorithm. By using this algorithm, the median number can be found out. The proposed technique can be implemented with perfect shuffle interconnects between active stages of compare and exchange elements. In this paper, all the designs are synthesized and created using MAX PLUS- II from ALTERA with f_max = 486.38 MHz.

References

[1]. Astola, J. T., & Campbell, T. G. (1989). On computation of the running median. IEEE Transactions on Acoustics, Speech, and Signal Processing, 37(4), 572- 574. https://doi.org/10.1109/29.17539

[2]. Cadenas, J., Megson, G. M., Sherratt, R. S., & Huerta, P. (2012). Fast median calculation method. Electronics Letters, 48(10), 558-560. https://doi.org/10.1049/el. 2012.0343

[3]. Christopher, L. A., Mayweather, W. T., & Perlman, S. S. (1988). A VLSI median filter for impulse noise elimination in composite or component TV signals. IEEE Transactions on Consumer Electronics, 34(1), 262-267. https://doi.org/ 10.1109/30.75377

[4]. Fahmy, S. A., Cheung, P. Y., & Luk, W. (2005, August). Novel FPGA-based implementation of median and weighted median filters for image processing. In International Conference on Field Programmable Logic and Applications, 2005. (pp. 142-147). IEEE. https://doi.org/10.1109/FPL.2005.1515713

[5]. Hinton, H. S. (1987, January). Applications of the photonic switching technology for telecommunications switching. In 1987 IEEE International Conference on Communications (ICC) (pp. 1559-1564).

[6]. Huang, A. (1986, January). The relationship between STARLITE, A wideband digital switch and optics. In 1986 IEEE International Conference on Communications (ICC) (pp. 1739-1743).

[7]. Huang, T., Yang, G. J. T. G. Y., & Tang, G. (1979). A fast two-dimensional median filtering algorithm. IEEE Transactions on Acoustics, Speech, and Signal Processing, 27(1), 13-18. https://doi.org/10.1109/TASSP. 1979.1163188

[8]. Karaman, M., Onural, L., & Atalar, A. (1990). Design and implementation of a general-purpose median filter unit in CMOS VLSI. IEEE Journal of Solid-State Circuits, 25(2), 505-513. https://doi.org/10.1109/4.52178

[9]. Lohmann, A. W. (1986). What classical optics can do for the digital optical computer. Applied Optics, 25(10), 1543-1549. https://doi.org/10.1364/AO.25.001543

[10]. Midwinter, J. E. (1987). Novel approach to the design of optically activated wideband switching matrices. IEE Proceedings J-Optoelectronics, 134(5), 261-268. https://doi.org/10.1049/ip-j.1987.0044

[11]. Stirk, C. W., & Athale, R. A. (1988). Sorting with optical compare-and-exchange modules. Applied Optics, 27(9), 1721-1726. https://doi.org/10.1364/AO.27.001721

[12]. Teja, V. R., Ray, K. C., Chakrabarti, I., & Dhar, A. S. (2008, January). High throughput VLSI architecture for one dimensional median filter. In 2008 International Conference on Signal Processing, Communications and Networking (pp. 339-344). IEEE. https://doi.org/10.1109/ ICSCN.2008.4447215

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[14]. Vasanth, K., Raj, S. N., Karthik, S., & Mol, P. P. (2010, December). FPGA implementation of optimized sorting network algorithm for median filters. In INTERACT-2010 (pp. 224-229). IEEE. https://doi.org/10.1109/INTERACT.2010. 5706144

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Research Paper

Automatic Traffic Management System for Emergency Vehicles

Jamuna* , Vinay M. G.**

*-** Department of Computer Science and Engineering, Vidyavardhaka College of Engineering, Mysuru, Karnataka, India.

Jamuna & Vinay, M. G., (2019). Automatic Traffic Management System for Emergency Vehicles. i-manager’s Journal on Digital Signal Processing, 7(1), 39-43. https://doi.org/10.26634/jdp.7.1.16445

Abstract

One of the major problems faced by people in their daily life is traffic. An efficient management system is required to provide efficient traffic control system. Identification of particular vehicle in the traffic flow is a notable task in the traffic management system. In this research work, the authors propose an automatic traffic management system for vehicle detection and counting and automatic signals Scheduling. The camera supplies video input to the processing engine. Initially, the video will be streaming on all four roads of the traffic circle. The values will be read frame by frame in the streaming video of these roads. Camera sends all the captured input images to the processing engine and this works based on the neural network. The traffic flow shows the traffic state in fixed time interval and helps to manage and control the traffic, especially when there is a heavy traffic and will consider emergency vehicles like ambulance and fire brigades, giving them priority to go.

References

[1]. Blaschko, M. B., & Lampert, C. H. (2008, October). Learning to localize objects with structured output regression. In European Conference on Computer Vision (pp. 2-15). Springer, Berlin, Heidelberg. https://doi.org/ 10.1007/978-3-540-88682-2_2

[2]. Buhler, K., Lambert, J., & Vilim, M. (n.d). Yoloflow realtime object tracking in video CS 229 course project. Retrieved from https://pdfs.semanticscholar.org/989c/ 7cdafa9b90ab2ea0a9d8fa60634cc698f174.pdf

[3]. Hegde, R., Sali, R. R., & Indira, M. S. (2013). RFID and GPS based automatic lane clearance system for ambulance. International Journal of Advanced Electrical and Electronics Engineering, 2(3), 102-107.

[4]. Jadhav, P., Kelkar, P., Patil, K., & Thorat, S. (2016). Smart traffic control system using image processing. International Research Journal of Engineering and Technology, 3(3), 1207-1211.

[5]. Jensen, M. B., Nasrollahi, K., & Moeslund, T. B. (2017). Evaluating state-of-the-art object detector on challenging traffic light data. In Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops (pp. 9-15).

[6]. Redmon, J., Divvala, S., Girshick, R., & Farhadi, A. (2016). You only look once: Unified, real-time object detection. In Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition (pp. 779-788).

[7]. Tao, J., Wang, H., Zhang, X., Li, X., & Yang, H. (2017, October). An object detection system based on YOLO in th traffic scene. In 2017 6 International Conference on Computer Science and Network Technology (ICCSNT) (pp. 315-319). IEEE. https://doi.org/10.1109/ICCSNT.2017. 8343709

[8]. Yang, W., Zhang, J., Wang, H., & Zhang, Z. (2018, May). A vehicle real-time detection algorithm based on YOLOv2 framework. In Real-Time Image and Video Processing 2018 (Vol. 10670, p. 106700N). International Society for Optics and Photonics. https://doi.org/10.1117/ 12.2309844

[9]. Zhang, J., Huang, M., Jin, X., & Li, X. (2017). A realtime chinese traffic sign detection algorithm based on modified YOLOv2. Algorithms, 10(4), 127. https://doi.org/ 10.3390/a10040127

i-manager's Journal on Digital Signal Processing (JDP)

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Volume 7 Issue 1 January - March 2019

Airbase Detection and Airship Recognition in High Spatial Resolution Remote Sensing Images

B. Bersi Beulah*

* Department of Electronics and Communication Engineering, PET Engineering College, Tirunelveli, Tamil Nadu, India.

Beulah, B. B. (2019). Airbase Detection and Airship Recognition in High Spatial Resolution Remote Sensing Images. i-manager’s Journal on Digital Signal Processing, 7(1),1-11. https://doi.org/10.26634/jdp.7.1.16264

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Design of Y Shaped 2x1 Encoder using Two Dimensional Photonic Crystals

K. Latha* , R. Arunkumar**, S. Robinson***

*-*** Department of Electronics and Communication Engineering, Mount Zion College of Engineering and Technology, Pudukkottai, Tamil Nadu, India.

Latha, K., Arunkumar, R., & Robinson, S. (2019). Design of Y Shaped 2x1 Encoder using Two Dimensional Photonic Crystals. i-manager’s Journal on Digital Signal Processing, 7(1), 12-19. https://doi.org/10.26634/jdp.7.1.16260

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Speed Enhancement of Modified Booths Encoding Algorithm Using Verilog HDL

Gopi Chand Naguboina* , T. Sravya**

* Department of Electronics and Communication Engineering, MVGR College of Engineering (A), Vizianagaram, Andhra Pradesh, India. ** Department of Electrical and Electronics Engineering, Lendi Institute of Engineering and Technology (A), Vizianagaram, Andhra Pradesh, India.

Naguboina, G. C., & Sravya. T. (2019). Speed Enhancement of Modified Booths Encoding Algorithm Using Verilog HDL. i-manager’s Journal on Digital Signal Processing, 7(1), 20-27. https://doi.org/10.26634/jdp.7.1.16434

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Developing Sidelobe Reduction Techniques using P4 Code for Pulse Compression Radar Applications

CH. Ramya Sree* , B. Kiranmai**, G. H. Sindhuja***, A. V. Sai Kumar****

*_***** Department of Electronics and Communication Engineering, Lendi Institute of Engineering and Technology, Vizianagaram, Andhra Pradesh, India.

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FPGA Based Implementation of Median Filter using Compare and Exchange Unit

Boni Srinu * , Srinu Bevara**, Nagendra Kumar M.***

Srinu, B., Bevara, S., & Kumar, N. M. (2019). FPGA Based Implementation of Median Filter using Compare and Exchange Unit i-manager’s Journal on Digital Signal Processing, 7(1),33-38. https://doi.org/10.26634/jdp.7.1.16435

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Automatic Traffic Management System for Emergency Vehicles

Jamuna* , Vinay M. G.**

*-** Department of Computer Science and Engineering, Vidyavardhaka College of Engineering, Mysuru, Karnataka, India.

Jamuna & Vinay, M. G., (2019). Automatic Traffic Management System for Emergency Vehicles. i-manager’s Journal on Digital Signal Processing, 7(1), 39-43. https://doi.org/10.26634/jdp.7.1.16445

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K. Latha* , R. Arunkumar, S. Robinson*

* Department of Electronics and Communication Engineering, MVGR College of Engineering (A), Vizianagaram, Andhra Pradesh, India.

** Department of Electrical and Electronics Engineering, Lendi Institute of Engineering and Technology (A), Vizianagaram, Andhra Pradesh, India.

CH. Ramya Sree* , B. Kiranmai, G. H. Sindhuja*, A. V. Sai Kumar****

Boni Srinu * , Srinu Bevara, Nagendra Kumar M.*