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i-manager's Journal on Embedded Systems (JES)

Current Issue Vol. 12 Issue 2

Most Cited

Volume 4 Issue 1 February - April 2015

Research Paper

Embedded Systems for the Internet of ThingsIn Product Design Education

Tom Page*

Senior Lecturer, Department of Electronic Product Design, Loughborough University, UK.

Page,T. (2015). Embedded Systems for the Internet of Things In Product Design Education. i-manager’s Journal on Embedded Systems, 4(1), 1-13. https://doi.org/10.26634/jes.4.1.3690

Abstract

The objective of this work identified whether there is a need to incorporate the Internet of Things (IoT) into the product design curriculum at the Loughborough Design School. Initial research into the subject area comprised an extensive literature review into the origins, growth, challenges and enabling technologies for the IoT. Furthermore, this work explored literature around IoT within the current curriculum and for product designers and graduates, however. Whilst this work considers the possibilities and capabilities through various visions and methods of application, the fundamentals of the technical side are considered in order to understand these possibilities for the IoT as a subject. A mixed-method research approach was design which used a structured questionnaire survey for product design students and interviews with design lecturers. The results revealed a majority agreement into the need and interest for the Loughborough Design School to incorporate IoT subject matter, however, with much debate (Ruhini, 2012) and discussion into how this may be envisioned. The work conclude with implementation through a mixed approach between basic technical teaching of microcontroller design applications combined with project-led problem based learning allowing students to combine their design skills into product concepts and prototypes in order to realise and develop the future Internet of Things. (Engk, 2014) (Hamblen, 2013).

References

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[8]. Daniel Ernst, K. V. (2007). “Unmanned Vehicle Controller Design, Evaluation and Implementation”: From MATLAB to Printed Circuit Board, J Intell Robot Syst (2007), 85–108.

[9]. Eng, K. (2014). “What's Next for the Internet of Things”. Retrieved, from Ideas TED: http://ideas.ted.com/ 2014/10/02/whats-next-for-the-internet-of-things/

[10]. Enrico Rukzio, K. L. (2006). “An Experimental Comparison of Physical Mobile Interaction Techniques: Touching, Pointing and Scanning”. Research Group Embedded Interaction, Media Informatics Group.

[11]. Gildea, K. M., and Milburn, N. (2013). “Open-source products for a lighting experiment device”. Behav Res (2014) 46, 960–983.

[12]. Hamblen, J. O., and Bekkum, G. M. (2013). “An Embedded Systems Laboratory to Support Rapid Prototyping of Robotics and the Internet of Things”. IEEE Transactions on Education , Vol. 56.

[13]. Newnes. Ioannis Stamelos, L. A. (2002). “Code quality analysis in open source software development”. Information Systems Journel, Vol. 12, pp. 43-60.

[14]. Jens Ziegler, L. U. (2011). “Advanced Interaction Metaphors for RFID-Tagged Physical Artefacts”. IEEE International Conference on RFID-Technologies and Applications. Dresden, Germany: Technische Universit¨at Dresden, Institute of Automation.

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[17]. Komarov, M. M., & Nemova, M. D. (2013). “Emerging of new service-oriented approach based on the Internet of Services and Internet of Things”, International Conference on e-Business Engineering, Moscow, Russia: IEEE .

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[23]. Oh, S.E., Bang, H. and Hwang, J.O. (2010). “Lightweight RFID device interface for controlling RFID tag memory access”, The 12th International Conference on Advanced Communication Technology (ICACT) 2010, Vol. 2, pp.l516-1521.

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[30]. Tan, L., and Wang, N. (2010). “Future Internet: The Internet of Things”, 3rd International Conference on Advanced Computer Theory and Engineering (ICACTE), Shanghai, China.

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Research Paper

Circuit Merging Versus Dynamic Partial Reconfiguration - The HoMade Implementation

Jean Perier* , Wissem Chouchene, Jean-Luc Dekeyser*

* Student, Polytechnic Paris, France.

Research scholar, University of Sciences and Technologies, France.

* Professor, Department of Computer Science, University of Sciences and Technologies, France

Perier,J., ,Chouchene,W., and Dekeyser,J. (2015). Circuit Merging Versus Dynamic Partial Reconfiguration - The H Made Implementation. i-manager’s Journal on Embedded Systems, 4(1), 14-23. https://doi.org/10.26634/jes.4.1.3691

Abstract

One goal of reconfiguration is to save power and the occupied resources. In this paper, we compare two different kinds of reconfiguration available on Field-Programmable Gate Arrays (FPGA) and authors discuss their pros and cons. The first method that we study is circuit merging. This type of reconfiguration methods consists of sharing common resources between different circuits. The second method that we explore is Dynamic Partial Reconfiguration (DPR). It is specific to some FPGA, allowing well defined reconfigurable parts to be modified during run-time. Authors show that DPR, when available, has good and more predictable result in terms of occupied area. There is still a huge overhead in terms of time and power consumption during the reconfiguration phase. Therefore, authors show that circuit merging remains an interesting solution on FPGA because it is not vendor specific and the reconfiguration time is around a clock cycle. Besides, good merging algorithms exist even-though FPGA physical synthesis flow makes it hard to predict the real performance of the merged circuit during the optimization. We establish the comparison in the context of the HoMade processor.

References

[1]. Xilinx corporation., “Dynamic and partial reconfiguration” Retrieved from http://www.xilinx.com /tools/partial-reconfiguration.html

[2]. Micro Blaqe, (2011). “MicroBlaze Processor Reference Guide UG081”.

[3]. S. A. Cook, (1971) “The complexity of theorem-proving procedures”, In Proceedings of the third annual ACM symposium on Theory of Computing, pp. 151–158.

[4]. C. Wolinski, K. Kuchcinski, E. Raffin, and F. Charot, (2009). “Architecture-Driven Synthesis of Reconfigurable Cells”, in 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD '09, pp. 531-538.

[5]. S. O. Memik, G. Memik, R. Jafari, and E. Kursun, (2003). “Global Resource Sharing for Synthesis of Control Data Flow Graphs on FPGAs”, In Proceedings of the 40th Annual Design Automation Conference, New York, NY, USA, 2003, p. 604–609.

[6]. N. Moreano, E. Borin, C. D Souza, and G. Araujo, (2005). “Efficient datapath merging for partially reconfigurable architectures”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 24, No 7, pp. 969-980, Juill.

[7]. P. Brisk, A. Kaplan, and M. Sarrafzadeh, (2004), “Areaefficient Instruction Set Synthesis for Reconfigurable System-on-chip Designs”, In Proceedings of the 41st Annual Design Automation Conference, New York, NY, USA, pp. 395–400.

[8]. S. Raje et R. A. Bergamaschi, (1997) “Generalized Resource Sharing”, In Proceedings of the 1997 IEEE/ACM International Conference on Computer-aided Design, Washington, DC, USA, p. 326–332.

[9]. Z. Huang, S. Malik, N. Moreano, and G. Araujo (2004), “ The Design of Dynamically Reconfigurable Datapath Coprocessors ”, ACM Trans. Embed. Comput. Syst., Vol. 3, No 2, p. 361–384, mai 2004.

[10]. K. Kuchcinski, (2003). “Constraints-driven Scheduling and Resource Assignment”, ACM Trans. Des. Autom. Electron. Syst., Vol. 8, No 3, p. 355–383, juill.

[11]. Xilinx corporation, “Reconfiguring User Logic Using Custom ICAP Processor and Monitoring ICAP Signals Using ChipScope Core Lab”, in http://forums.xilinx.com/ xlnx/attachments/xlnx/EDK/23008/1/lab04.pdf

[12]. Xilinx corporation, “Driving ICAP Resource”, Retrieved from http://home.mit.bme.hu/~feher/ Reconf_Comp/10_Driving_ICAP.pdf

[13]. Xilinx Inc., (2006). “OPB_HWICAP (v1.00.b) Product Specification”, DS280, Jul.

[14]. F. Duhem, F. Muller, and P. Lorenzini, (2011). “FaRM: Fast Reconfiguration Manager for Reducing Reconfiguration Time Over head on FPGA” , "Reconfigurable Computing: Architectures, Tools and Applications, pp. 253-260,

[15]. Robin Bonamy, Hung-Manh Pham, Sebastien Pillement, and Daniel Chillet, (2012). “UPaRC—Ultra-fast power-aware reconfiguration controller ”, Design, Automation & Test in Europe Conference & Exhibition (DATE),

[16]. Hung-Manh Pham, Van-Cuong Nguyen, and Trong- Tuan Nguyen, (2012). “DDR2/DDR3-based ultra-rapid reconfiguration controller ”, Communications and Electronics (ICCE), Fourth InternationalConference on DOI: 10.1109/CCE.2012.6315949 -2012.

[17]. Xilinx, Inc, (2011). “\Logicore ip multi-port memory controller (mpmc)(ds643 v6.03.a),".

[18]. V. Manohararajah, G. R. Chiu, D. P. Singh, and S. D. Brown, (2006). “Difficulty of Predicting Interconnect Delay in a Timing Driven FPGA CAD Flow “, In Proceedings of the 2006 International Workshop on System-level Interconnect Prediction, New York, NY, USA, , pp. 3–8.

[19]. “7 Series FPGAs Memory Interface Solutions User Guide UG586”, March 1, 2011.

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Research Paper

Development of Real Time Embedded Control System for Transfer Arm Examination Facility in PFBR

R.Poornima* , G. Kannan**

* PG Scholar, Department of Electronics and Communication, B.S. Abdur Rahman University, Chennai, India.

** Assistant Professor, Department of Electronics and Communication, B.S. Abdur Rahman University, Chennai, India.

Poornima.R., and Kannan.G. (2015), Development of Real Time Embedded Control System for Transfer Arm Examination Facility in PFBR. i-manager’s Journal on Embedded Systems, 4(1), 24-27. https://doi.org/10.26634/jes.4.1.3692

Abstract

Transfer Arm (TA) is an offset arm type fuel-handling machine which is designed to handle core sub-assemblies consisting of fuel, absorber, blanket and reflector sub assemblies. The Transfer Arm Examination Facility (TAEF) control system is to facilitate the operation of Transfer Arm from the local control panel. The control system controls the raising and lowering of Guide Tube, raising and lowering of Gripper Hoist, rotation of Top Structure, opening and closing of Gripper Fingers and locking and unlocking of gripper hoist. The embedded control system has to be highly reliable as it will affect the safety and availability of nuclear plant. Hence, it is proposed to develop a real time embedded control system to carry out the safe operations on Transfer Arm. The project work involves, modelling the control logics (interlocks) using Safety Critical Application Development Environment (SCADE) suite, carryout the model coverage and simulation analysis and formal verification of the model using design verifier of the SCADE suite by creating few critical properties. The SCADE generated code has to be integrated with the hardware using cross complier, generate executable file and test the functionality system. The manual code shall contain necessary diagnostic logics to test the healthiness of the system. Adequate test cases have to be generated from the requirements. The status of all drives will be monitored through a GUI.

References

[1]. Design Note on I&C of Transfer Arm Examination Facility -FBR/63522/CN/1010/R-0

[2]. Haifeng WANG, and Shou LIU. “Modeling Communications-Based Train Control System – Case study”, 2nd International conference on Industrial Mechatronics and Automation.

[3]. Lucas Martin, Maxim Schatalov, Matthias Hagner, and Ursula Golts, “A Methodology for Model Based Development and automated verification of software for Aerospace Systems”. IEEE pp 1-19.

[4]. Haifeng Wang and Shou Liu. “Study on Model-Based safety verification of Automatic Train protection System”, IEEE, pp 467-470.

[5]. Chemane, L.A. Nunes, A.F. and Hancke, G.P. “Integrating modern instrumentation, control and information technology in the undergraduate laboratory”. IEEE, Vol. 2, pp 1426-1431.

[6]. Kee-Choon Kwon, Soon-Ja Song, Won-Man Park, Jang-Soo Lee and Jang-Yeol Kim. “Development of the test simulator for advanced instrumentation and control research”. IEEE, pp 7/1-7/6.

[7]. Jie Qian, Jing Liu, Xiang Chen, and Junfeng Sun. “Modeling and Verification of Zone Controller: The SCADE Experience in China's Railway Systems”, IEEE, pp. 23.

[8]. Vidrasan, I. and Letia, T. “Conversion of Delay Time Petri net models into SCADE projects”, IEEE, pp 118-122.

[9]. Chan-Ho Cho, Dong-Hyuk Choi, Zhong-Hua Quan, Sun-Ah Choi, Gie-Soo Park, and Myung-Seon Ryou. “Modeling of CBTC carborne ATO functions using SCADE” IEEE, pp 1089-1093.

[10]. Wakankar, A., Bhattacharjee, A.K., Dhodapkar, S.D., Pandya, P.K. and Arya, K. “Automatic test case generation in model based software design to achieve higher reliability”. IEEE, pp. 493-499.

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Research Paper

Virtual Experiments in Physics through Computer Technology: Simulation Model of Thevenin Theorem

K. R. Patel* , V.D. Patel**

* Assistant Professor, Sheth M. N. Science College, Patan, India.

** Associate Professor, Municipal Arts & Urban Bank Science College, Mehsana, India.

Patel.K.R., and Patel.V.D. (2015). Virtual Experiments in Physics through Computer Technology: Simulation Model of Thevenin Theorem. i-manager’s Journal on Embedded Systems, 4(1), 28-31. https://doi.org/10.26634/jes.4.1.3693

Abstract

This paper concerned an application of SCADA (Supervisory Control And Data Acquisition) in the field of electronics. In this paper, authors build up controlled simulation of Thevenin Theorem in the interest of student's practical work. A Wonderware (Intouch 9.0 – Demo), SCADA system was used to build up simulation. Visual basic language is used to program appropriate components of simulation to obtain identical simulation. Entire simulations build up in two separate parts in a single combined application. One Part will provide experimental platform of actual circuit containing three resistors and one source. Second Part provides equivalent replaced circuit containing one source and one resistor as per Thevenin theorem. Simulation contain all required components like Variable Power source, Voltmeter, Ameter, Cables, Resistors which were used in the actual experiment. A group of students were examined to determine the capability of simulation model.

References

[1]. Frank,A.J.L., Wouter,R.V.J., and Lars,B. (2013). “Using self-made drawings to support modelling in science education”, British Journal of Educational Technology, Vol. 44, No. 1, pp. 82–94.

[2]. Fouh,E., Akbar,M., and Shaffer, C.A. (2012). “The role of visualization in Computer Science education”. Computers in the Schools, Vol. 29, No. 1-2, pp. 95–117.

[3]. Karen, L.V., Vera, J.W., et al., (2011). Visualization in Science Education”, ASEJ, Vol. 41, No. 1, pp. 22-30.

[4]. Annetta, L.A., Minogue, J., et al., (2009). “Investigating the Impact of Video Games on High School Students: Engagement and Learning about Genetics”,. Computers and Education, Vol. 53, No. 1, pp. 74–85.

[5]. Korakakis, G., Pavlatou, E.A., et al. (2009). “3D Visualization Types in Multimedia Applications for Science Learning: A Case Study for 8th Grade Students in Greece”. Computers and Education, Vol. 52, No. 2, pp. 390–401.

[6]. Limniou,M., Roberts,D. and Papadopoulos,N. (2008). “Full Immersive Virtual Environment CAVE™ in Chemistry Education”. Computers and Education, Vol. 51, No. 2, pp. 584–93

[7]. Andri,I., Alexander,R., David,W., Diane,K., Lisa,L., and Christof,D. (2010). “A Collective Simulation for teaching health science”, International Journal of Computer-Supported Collaborative Learning, Vol. 5, No. 2, pp. 141-166.

[8]. Noel,E., Joshua,A.D., Girlie,D., and Melissa,K. (2012). “Learning physics through play in an augmented reality environment”. International Journal of Computer- Supported Collaborative Learning, Vol. 7, No. 3, pp. 347- 378.

[9]. Juan,C.C., Paul,A., and Fred,P. (2015). “Animations showing Lego manipulative tasks: Three potential moderators of effectiveness”. Computers & Education, Vol. 85, pp. 1–13.

[10]. Zacharia,Z.C. (2007). “Comparing and combining real and virtual experimentation: an effort to enhance students' conceptual understanding of electric circuits”, Journal of Computer Assisted Learning, Vol. 23, No. 2, pp. 120–132.

[11]. Niedderer,H., Schecker,H., and Bethge, T. (1991). “The role of computer-aided modelling in learning physics”, Journal of Computer Assisted Learning, Vol. 7, No. 2, pp. 84–95.

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Research Paper

FGPA Usage of Modified Diffie-Hellman Key Trade calculation utilizing Zero Knowledge Proof

Sri Harsha Davuluri* , Srinivas Bachu, K. Satya Sujith*

__ Assistant Professor, Department of Electronics and Communication Engineering, Guru Nanak Institutions Technical Campus, Hyderabad, Telangana, India.

Davuluri,S,H., Bachu,S., and Sujith,S.K. (2015). FGPA Usage of Modified Diffie-Hellman Key Trade calculation utilizing Zero Knowledge Proof. i-manager’s Journal on Embedded Systems, 4(1), 32-40. https://doi.org/10.26634/jes.4.1.3694

Abstract

There are networks and entity groupings that require authentications while preserving the privacy of the entity being authenticated. Zero – Knowledge Proof (ZKP) plays a vital role in authentications without revealing the secret information. The proposed work carries criticism of ZKP, and Diffie–Hellman Key Exchange Algorithm (DHKEA). A new ZKP has been proposed based on modifications of the DHKEA. As per the modifications, two versions of the proposed protocols were developed. Verilog HDL is effectively utilized to complete the design of the proposed protocols. Results will be verified through simulations and FPGA target board. The proposed tradition fulfills the ZKP properties and are secured against discrete logarithm strike and man-in-the middle attack. The proposed figuring serves as key exchange count with the development to affirmation organizations.

References

[1]. Ibrahem, M.K. (2012), “Modification of Diffie Hellman Key Exchange Algorithm”, Future Communication Networks (ICFCN), International Conference, pp. 147 - 152.

[2]. Emmanuel Bresson, Olivier Chevassut, David Pointcheval, and Jean-Jacques Quisquater (2001). “Provably Authenticated Group Diffie-Hellman Key Exchange”, Computer and Communication Security, Proc. of ACM CCS'01, p.p. 255-264.

[3]. Back, Amanda, (2009), "The Diffe-Hellman Key Exchange", Retrieved from http://129.81.170.14 /~erowland/courses/2009-2/projects/Back.pdf.

[4]. Clausen, Andrew, (2007), "Logical Composition of Zero - Knowledge Proofs", Retrieved from http:// www.econ.upenn.edu /_clausen.

[5]. Endre Bangerter, et al, (2009), "On the Design and Implementation of Efficient Zero-Knowledge Proofs of Knowledge", Proceedings of the 2nd ECRYPT Conference on Software Performance Enhancement for Encryption and Decryption and Cryptographic Compilers (SPEEDCC' 09), Berlin, Germany.

[6]. Fischer, Michael J., (2010), "Cryptography and Computer Security", Department of Computer Science, Yale University.

[7]. Forouzan, Behrouz A. (2008), Cryptography and Network Security, McGraw-Hill, Int. Ed, 2008.

[8]. Hellman, Martin E., (2002), "An Overview of Public Key Cryptography", IEEE Communications Magazine, pp: 42- 49.

[9]. P. Bhattacharya, M. Debbabi and H. Otrok, (2005), "Improving the Diffie-Heliman Secure Key Exchange", International Conference on Wireless Networks, Communications and Mobile Computing.

[10]. Maurer Ueli, (2009), "Unifying Zero-Knowledge Proofs of Knowledge", Africacrypt 2009, LNCS 5580, pp. 272–286.

[11]. Michael Backes and Dominique Unruha, (2009). "Computational Soundness of Symbolic Zero-Knowledge Proofs", Journal of Computer Security, Vol. 18, No. 6, pp. 1077-1155, 2010.

[12]. Mohr, Austin (2007), "A Survey of Zero-Knowledge Proofs with Applications to Cryptography", Southern Illinois University.

[13]. Kizza, Joseph M, (2010), "Feige-Fiat-Shamir ZKP Scheme Revisited", International Journal of Computing and ICT Research, Vol. 4, No. 1.

[14]. Simari, Gerardo I., (2002), "A Primer on Zero Knowledge Protocols", Technical report, Universidad Nacional del Sur, Buenos aires, argentina.

[15]. Stallings, William (2010), "Cryptography and Network Security", Prentice Hall, 5th Ed. 2010.

[16] . Velten, Michael, (2006), "Zero-Knowledge The Magic of Cryptography", Saarland University.

[17]. Krantz, Steven G., (2007), "Zero Knowledge Proofs", AIM Preprint Series, Volume 10-46.

i-manager's Journal on Embedded Systems (JES)

Current Issue Vol. 12 Issue 2

Most Read

Most Cited

Volume 4 Issue 1 February - April 2015

Embedded Systems for the Internet of ThingsIn Product Design Education

Tom Page*

Senior Lecturer, Department of Electronic Product Design, Loughborough University, UK.

Page,T. (2015). Embedded Systems for the Internet of Things In Product Design Education. i-manager’s Journal on Embedded Systems, 4(1), 1-13. https://doi.org/10.26634/jes.4.1.3690

Abstract

References

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Circuit Merging Versus Dynamic Partial Reconfiguration - The HoMade Implementation

Jean Perier* , Wissem Chouchene**, Jean-Luc Dekeyser***

* Student, Polytechnic Paris, France. ** Research scholar, University of Sciences and Technologies, France. *** Professor, Department of Computer Science, University of Sciences and Technologies, France

Perier,J., ,Chouchene,W., and Dekeyser,J. (2015). Circuit Merging Versus Dynamic Partial Reconfiguration - The H Made Implementation. i-manager’s Journal on Embedded Systems, 4(1), 14-23. https://doi.org/10.26634/jes.4.1.3691

Abstract

References

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Development of Real Time Embedded Control System for Transfer Arm Examination Facility in PFBR

R.Poornima* , G. Kannan**

* PG Scholar, Department of Electronics and Communication, B.S. Abdur Rahman University, Chennai, India. ** Assistant Professor, Department of Electronics and Communication, B.S. Abdur Rahman University, Chennai, India.

Poornima.R., and Kannan.G. (2015), Development of Real Time Embedded Control System for Transfer Arm Examination Facility in PFBR. i-manager’s Journal on Embedded Systems, 4(1), 24-27. https://doi.org/10.26634/jes.4.1.3692

Abstract

References

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Virtual Experiments in Physics through Computer Technology: Simulation Model of Thevenin Theorem

K. R. Patel* , V.D. Patel**

* Assistant Professor, Sheth M. N. Science College, Patan, India. ** Associate Professor, Municipal Arts & Urban Bank Science College, Mehsana, India.

Patel.K.R., and Patel.V.D. (2015). Virtual Experiments in Physics through Computer Technology: Simulation Model of Thevenin Theorem. i-manager’s Journal on Embedded Systems, 4(1), 28-31. https://doi.org/10.26634/jes.4.1.3693

Abstract

References

Full Article (HTML)

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FGPA Usage of Modified Diffie-Hellman Key Trade calculation utilizing Zero Knowledge Proof

Sri Harsha Davuluri* , Srinivas Bachu**, K. Satya Sujith***

*_**_*** Assistant Professor, Department of Electronics and Communication Engineering, Guru Nanak Institutions Technical Campus, Hyderabad, Telangana, India.

Davuluri,S,H., Bachu,S., and Sujith,S.K. (2015). FGPA Usage of Modified Diffie-Hellman Key Trade calculation utilizing Zero Knowledge Proof. i-manager’s Journal on Embedded Systems, 4(1), 32-40. https://doi.org/10.26634/jes.4.1.3694

Abstract

References

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Jean Perier* , Wissem Chouchene, Jean-Luc Dekeyser*

* Student, Polytechnic Paris, France.

Research scholar, University of Sciences and Technologies, France.

* Professor, Department of Computer Science, University of Sciences and Technologies, France

* PG Scholar, Department of Electronics and Communication, B.S. Abdur Rahman University, Chennai, India.

** Assistant Professor, Department of Electronics and Communication, B.S. Abdur Rahman University, Chennai, India.

* Assistant Professor, Sheth M. N. Science College, Patan, India.

** Associate Professor, Municipal Arts & Urban Bank Science College, Mehsana, India.

Sri Harsha Davuluri* , Srinivas Bachu, K. Satya Sujith*

__ Assistant Professor, Department of Electronics and Communication Engineering, Guru Nanak Institutions Technical Campus, Hyderabad, Telangana, India.