i-manager's Journal on Embedded Systems (JES)


Volume 2 Issue 4 November - January 2014

Research Paper

A Hybrid EP-SA-TS Method To Solve The Hydro – Thermal Unit Commitment Problem

Nimain Charan Nayak*
Professor, MNM Jain Engineering College, Chennai, India.
Nayak,N,C. (2014). A Hybrid EP-SA-TS Method to Solve the Hydro – Thermal Unit Commitment Problem. i-manager’s Journal on Embedded Systems, 2(4), 1-11. https://doi.org/10.26634/jes.2.4.2801

Abstract

This paper presents a new approach to solve the Hydro – Thermal short-term unit commitment problem using hybrid algorithm based on Evolutionary Programming, Simulated Annealing and Tabu Search Method. The objective of this paper is to find the generation scheduling such that the total operating cost can be minimized, when subjected to a variety of constraints. This also means that it is desirable to find the optimal generating unit commitment in the power system for the next H hours. Evolutionary programming is a Global Optimization Technique for solving Unit Commitment Problem that operates on a system, which is designed to encode each unit's operating schedule with regard to its minimum up/down time. Simulated Annealing and Tabu Search methods improve the status by avoiding entrapment in local minima. A seven unit utility power system with twelve generating units in India demonstrates the effectiveness of the proposed approach; Extensive studies have also been performed for different IEEE test systems consisting of 10, 26 and 34 Units. Numerical results are shown comparing the cost solutions and computation time obtained by the proposed hybrid method and other conventional methods like Dynamic Programming, Legrangian Relaxation in reaching proper unit commitment.

Research Paper

Fault Detection Methods for Interconnects in ReconfigurableHardware

Pradeep C* , Radhakrishnan R**
* Research Scholar, Anna University, Tamilnadu.
** Professor, SSIET, Tamilnadu.
Pradeep.C., and Radhakrishnan.R. (2014).Fault Detection Methods for Interconnects in Reconfigurable Hardware. i-manager’s Journal on Embedded Systems, 2(4), 12-19. https://doi.org/10.26634/jes.2.4.2803

Abstract

The testing of reconfigurable hardware is performed in logic block and interconnects. There are two methods of testing, application independent and application dependent. Simulation results of detection method for permanent faults and transient faults in interconnects are presented in this paper. This method for permanent fault detection, tests the resources that are utilized by a specific design implemented on Field Programmable Gate Array (FPGA). A possible approach to reduce the number of test configurations will shorten test time with complete coverage and less power consumption which is presented. In the proposed method, an activating input is connected to multiple nets, thus generating a compact set of activating test vectors. This method achieves good fault coverage with reduced number of test configurations. It covers all possible stuck-at and bridging faults in the interconnects.Transient fault detection used in this paper is an application independent method.The proposed methods are useful for building self repairable systems.The simulation is performed using the Xilinx ISE 13.6 and ModelSim 6.6b.

Research Paper

Influencing Parameters Of Image Display Acceleration

N. Harathi* , V. Meenakshi**, C.H. Suneetha***
*-** Assistant Professor, Department of EIE, Sree Vidyanikethan Engineering College Tirupati.
*** Associate Professor, Department of ECE, Vignana Bharathi Institute of Technology, Aushapur.
Harathi.N., Meenakshi.V., and Suneetha.CH. (2014).Influencing Parameters Of Image Display Acceleration. i-manager’s Journal on Embedded Systems, 2(4), 20-30. https://doi.org/10.26634/jes.2.4.2804

Abstract

Based on the idea of combining Embedded system with Image processing, this paper designs an embedded system which simulates the weapon mode. In this a background picture should be moved quickly by S3C2440 processor which is based on ARM9.Due to the limitation of hardware resources in embedded systems, it is difficult to realize high speed image processing with conventional solution. In this paper, the authors discussed about the DMA technology and Software Algorithm that provides smooth, stable and fast moving images. It provides good reference for graphic development on embedded systems.

Research Paper

An Empirical Study on Privacy-Preserving Models

M.Giri* , S. Madhumitha**
* Professor and Head, Department of CSE, Sreenivasa Institute of Technology and Management Studies, Chittoor, Andhra Pradesh, India.
** M.Tech Scholar, Department of CSE, Sreenivasa Institute of Technology and Management Studies, Chittoor, Andhra Pradesh, India.
Giri.M., and Madhumitha.S. (2014). An Empirical Study On Privacy-Preserving Models. i-manager’s Journal on Embedded Systems, 2(4), 31-36. https://doi.org/10.26634/jes.2.4.2805

Abstract

In real world many organizations deal with large amount of data, which are the private information collected from individuals. They need to provide security measures to the private data, to provide the results without revealing private information. Many individuals are afraid of exposing their own information and give false inputs and the organizations should be careful about when and where to expose the privacy information and provide security controls. This is how the privacy preserving data mining has become more popular in recent years. In this paper we discuss about various privacy preserving data mining models and also provide comparative study on it. Measuring different techniques, the authors propose that secure multiparty computation mechanism is the best solution for protecting the private information.

Research Paper

Design of New Multilevel Inverter Topology for Various Unipolar Inverted Sine Carrier PWM Strategies

C. R. Balamurugan* , S. P. Natarajan**, M. Arumugam***, R. Bensraj****
*,*** Department of EEE, Arunai Engineering College, Tiruvannamalai, Tamilnadu, India.
**,****Annamalai University, Chidambaram, Tamilnadu, India
Balamurugan.C.R., Natarajan.S.P., Arumugam.M., and Bensraj.R. (2014). Design Of New Multilevel Inverter Topology For Various Unipolar Inverted Sine Carrier PWM Strategies. i-manager’s Journal on Embedded Systems, 2(4), 37-43. https://doi.org/10.26634/jes.2.4.2806

Abstract

Multilevel Inverters have been widely used for high power and high voltage applications as their performance is highly superior to that of conventional two level inverters due to reduced harmonic distortion, lower electromagnetic interference, and higher dc link voltages, but it has some disadvantages such as increased number of components, complex pulse width modulation control method and voltage-balancing problem. In order to compensate the above described disadvantages a new topology with a reversing voltage component is proposed to improve the multilevel performance. This topology requires fewer components compared to existing inverters (particularly in higher levels) and requires fewer carrier signals and gate drives. Therefore, the overall cost and complexity are greatly reduced particularly for higher output voltage levels. Finally, a prototype of the seven level proposed topology is built and tested with different modulation strategies to show the performance of the inverter by experimental results using MATLAB-SIMULINK. By comparing the various PWM techniques, it is observed that UAPODPWM provides less THD, and UCOPWM techniques provide higher fundamental RMS output voltage.