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Effect of Scaling on Phase Frequency Detector

Latika Gulihar*, Bal Krishan**

* Assistant Professor, Department of Electronics Engineering, Satya College of Engineering and Technology, Palwal, Haryana, India.

** Assistant Professor, Department of Electronics Engineering, YMCA University of Science and Technology, Faridabad, Haryana, India.

Periodicity:September - November'2016
DOI : https://doi.org/10.26634/jele.7.1.8280

Abstract

Phase Frequency Detectors (PFD) are the most important components of Phase Locked Loops (PLLs) which gives an output that is linearly proportional to the phase difference of the reference signal (CKR) and output of VCO (CKF) [8]. PFD has a number of applications in communication systems, wireless sensors, and robotics. Some application are focused on the efficiency or bandwidth, some other on low noise and jitters or it can be its size. In this paper, effect of scaling on a latch based PFD is presented. This paper presents the compassion of various technologies using different channel lengths and is useful to determine which is the best suitable channel length having best characteristics. Various technologies of CMOS are used and the performance is considered on the basis of two parameters-power consumed and delay in output when input is already given. The authors have used Tanner EDA 14.11 version on various technologies.

Keywords

PLL, PFD, CMOS, CKR, CKF, UP, DN

How to Cite this Article?

Gulihar, L., and Krishan, B. (2016). Effect of Scaling on Phase Frequency Detector. i-manager's Journal on Electronics Engineering, 7(1), 20-24. https://doi.org/10.26634/jele.7.1.8280

References

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[7]. Wu-Hsin Chen, Maciej E. Inerowicz, and Byunghoo Jung, (2010). “Phase Frequency Detector With Minimal Blind Zone for Fast Frequency Acquisition”. IEEE Transaction on Circuit and Systems -II, Vol.57, No.12.

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Effect of Scaling on Phase Frequency Detector

Abstract

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