Design of 2D-DCT and Quantization Using Dadda and Vedic Multipliers

P. Vinay Mallik*, G. Hemachandra**
* PG Scholar, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupathi, India.
** Assistant Professor, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupathi, India.
Periodicity:July - September'2016
DOI : https://doi.org/10.26634/jdp.4.3.8144

Abstract

In this generation of Internet of Things (IoT), a lot of image processing algorithms are applied on high resolution displays which are used in mobile devices of various sizes. It becomes vital to design a high speed and low-power image processing algorithm for high speed transmission and processing of data. This paper proposes a progressive design of 2D-DCT and quantization which is one of the abundantly used image processing algorithm and is realized using Dadda and Vedic multipliers which work in real time exceptionally in both parallel and pipelined process for calculating 2D-DCT. The high speed, accuracy and less hardware complexity of the proposed systems outclass with those of other presentday systems. The frequency of proposed system is increased to 185.048 which is 19% when compared to the prevailing systems. The proposed system architecture can be easily modified to compute 2D-IDCT which decompress the coefficients to get the image value.

Keywords

IoT, 2D-DCT, Dadda Multipliers, Vedic Multipliers, Real Time, Pipelined, Parallel.

How to Cite this Article?

Mallik,V.P., and Hemachandra.G. (2016). Design of 2D-DCT and Quantization Using Dadda and Vedic Multipliers. i-manager’s Journal on Digital Signal Processing, 4(3), 21-26. https://doi.org/10.26634/jdp.4.3.8144

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