A Novel Design of Efficient Adaptive FIR Filter by using A1CSAS

B. Rajani*, T. Krishna Murthy**
* PG Scholar, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.
** Assistant Professor, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.
Periodicity:June - August'2016
DOI : https://doi.org/10.26634/jele.6.4.8088

Abstract

The Adaptive FIR filters plays an important role in Digital Signal Processing. This paper presents a Novel Design of efficient Adaptive FIR filters by using A1CSAS. Many of the devices are powered by batteries. Therefore, there is a need for an excellent compromise between performance and power consumption. Usually, either delay or power is prioritized in this paper. These requirements are conflicting normally; when one requirement is optimized the other is affected. The delay is reduced by using carry select adder with add one select block (A1CSAS) in the inner product of the Adaptive FIR filter. Adaptive FIR filters are performed by Distributed Arithmetic process because it is an easy and simple method. Inner products in the DA table are calculated by using Distributed Arithmetic process. The add one carry select adder (A1CSA) is replaced by the proposed A1CSAS in order to the reduce the delay, and time complexity and to improve the speed. A1CSAS is better than A1CSA in terms of LUT's and Delay. The main aim of the project is to maintain a simplicity construction and reduce LUT's and Delay. The simulation results are obtained by using Xilinx ISE 14.5 version tool.

Keywords

Adaptive FIR Filter, Distributed Arithmetic, DLMS, Four Point Inner Product, A1CSA, A1CSAS.

How to Cite this Article?

Rajani, B., and Murthy, T.K. (2016). A Novel Design of Efficient Adaptive FIR Filter by using A1CSAS. i-manager's Journal on Electronics Engineering, 6(4), 13-17. https://doi.org/10.26634/jele.6.4.8088

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