i-manager Publications

FPGA based parallel hardware architecture for real time object classification

Sabarinathan E.*, E. Manoj**

* PG Student, Department of Electrical and Electronics Engineering, K.S.R. College of Engineering, Tiruchengode, Namakkal, India.

** Department of Electrical and Electronics Engineering, Coimbatore Institute of Technology, Coimbatore, India.

Periodicity:December - February'2015
DOI : https://doi.org/10.26634/jpr.1.4.3309

Abstract

Efficacious Recognition and consistent identification of visual features is an important problem in applications, such as Object Recognition, Structure from Motion, Image Indexing and Visual Localization. The input data takes, many forms such as Video Sequences, views from Multiple Cameras or Multi-dimensional data from a scanner. Concurrent performance is a perilous demand to utmost of these applications, which necessitate the finding and corresponding of the visual features in real time. Although Feature Recognition and Identification Methods have been studied in the Literature, due to their Computational Intricacy, pure software execution by Unique Hardware is far from suitable in their performance for Real Time Applications. The existing system consists of Scale Invariant Feature Transform (SIFT) for Feature Detection and Binary Robust Independent Elementary Features (BRIEF) for Feature Description and Matching. This system fails to detect the features which are invariant to scale, change in viewpoint and illumination, and the addition of noise. The proposed system consists of Wavelet Feature Extraction Method, and for classification process, Subtractive Clustering is used. This system reduces time consumption and overall system complexity. This paper focuses on a different hardware design to enable real-time performance of founding correspondences between idealistic sequential frames of high-resolution 720 p (1280 x 720) video. Due to these assistances, the proposed system attains feature detection and matching at 60 frame/s for 720-p video. Its processing speed can encounter and even overdo the demand of most realistic concurrent video analytics applications.

Keywords

Feature Recognition and Identification; Field Programmable Gate Array (FPGA); Wavelet Feature Extraction; Adaptive Neuro-Fuzzy Inference System (ANFIS).

How to Cite this Article?

Sabarinathan, E., and Manoj, E. (2014). FPGA based parallel hardware architecture for real time object classification. i-manager’s Journal on Pattern Recognition, 1(4), 35-44. https://doi.org/10.26634/jpr.1.4.3309

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FPGA based parallel hardware architecture for real time object classification

Abstract

Keywords

How to Cite this Article?

References

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