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Autonomous Self Healing Of Reconfigurable Circuits

B. Harikrishna*, S.Ravi**

* Research Scholar, Sathyabama University, Chennai, India.

** Professor & Head, Department of Electronics Engineering, Dr.M.G.R University, Chennai.

Periodicity:April - June'2013
DOI : https://doi.org/10.26634/jdp.1.2.2328

Abstract

This paper presents an analysis of the fault tolerance achieved by an autonomous evolvable system. By using this method the system may self recover from both transient and cumulative faults. In this paper we present a new technique NSCLB for reconfiguring FPGA circuits. An example of 24 CLBs is tested and results show that it may properly recover more number of faults. The faulty CLB is replaced both structurally and functionally. By selecting the nearest spare the routing path is decreased. The method is implemented using VHDL language in Xilinx10.1 version.

Keywords

NSCLB, CLB, FPGA, Xilinx

How to Cite this Article?

Harikrishna.B., and Ravi.S. (2013). Autonomous Self Healing Of Reconfigurable Circuits. i-manager’s Journal on Digital Signal Processing, 1(2), 19-23. https://doi.org/10.26634/jdp.1.2.2328

References

[1]. John M. Emmert, Charles E. Stroud, and Miron Abramovici, (2007). “Online Fault Tolerance for FPGA Logic Blocks”, IEEE Transactions On Very Large Scale Integration (Vlsi) Systems, Vol. 15, No. 2, February 2007, Pp.No. 216-226.

[2]. J. Cheatham, J. M. Emmert, and S. Baumgart, (2006). “A survey of fault tolerant methodologies for FPGAs,” ACM Trans. Des. Autom. Electron.Syst., Vol. 11, No. 2, pp. 501–533, Apr. 2006.

[3]. D. Bradley, C. Ortega-Sanchez, and A. Tyrrell, (2000). “Embry-onics immunotronics:a bio-inspired approach to fault tolerance,” NASA/DoD Workshop on Evolvable Hard-ware.

[4]. G. Tempesti, D. Mange, P.A. Mudry, J. Rossier, and A. Stauffer, (2007). “Self-replicating hardware for reliability:The embryonics project,” ACM Journal on Emerging Technologies in Computing Systems, Vol. 3, No. 2.

[5]. P. A. Mudry, F. Vannel, G. Tempesti, and D. Mange, (2007).“CONFETTI : A reconfigurable hardware platform for prototyping cellular architectures, ”International Paral-lel and Distributed Processing Symposium.

[6]. R. Cuddapah and M. Corba, (1995). Reconfigurable Logic for Fault Tolerance. New York: Springer-Verlag.

[7]. Altera Inc.,(1999). Data Book.

[8]. Xilinx Inc.,(1999). Data Book.

[9]. J. M. Moreno, Y. Thoma, and E. Sanchez, (2005). “POEtic: A prototyping platform for bio-inspired hardware,” Evolvable Systems: From Biology to Hardware (LNCS) (2005).

[10]. Altera Inc.,(1999). Data Book.

[11]. Xilinx Inc.,(1999). Data Book, 1999

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