Fundamentals of Digital system Design using VHDL and DSCH3

Ramachandran G*, B. Rajasekaran**, Karthika M.S***, Kalaivani S****, Suresh Kumar.G*****, K.Jayaram******
*-**-***-*****-****** Assistant Professor, Department of Electronics and Communication Engineering, VMKVEC, Salem.
**** Associate Professor, Department of Electronics and Communication Eng., Madurai Institute of Engineering and Technology. Sivagangai.
Periodicity:March - May'2013
DOI : https://doi.org/10.26634/jcom.1.1.2275

Abstract

A set of test vectors that detects all single stuck-at faults on all primary inputs of a fanout free combinational logic circuit will detect all single stuck –at faults in that circuit . A set of test vectors that detect all single stuck-at faults on all primary inputs and all fanout branches of a combinational logic circuit will detect all single stuck-at faults in that circuit. Design of logic integrated circuits in CMOS technology is becoming more and more complex since VLSI is the interest of many electronic IC users and manufactures . A common problem to be solved by designers, manufactures and users is the testing of these Ics. Testing can be expressed by checking if the outputs of a function systems (functional block, integrated circuits , printed circuit board or a complete systems) correspond to the inputs applied to it . If the test of this function system is positive , then the system is good for use. If the outputs are different than expected. Then the system has a problem : so either the system is rejected (go/no go test) , or a diagnosis is applied to it , in order to point out and probably eliminate the problem’s causes.

Keywords

CMOS, Testing, Fan out, IC,PCB,VLSI

How to Cite this Article?

Ramachandran, G., Sureshkumar, G., Rajasekaran, B., Karthika, M.S., Jayaram, K., and Kalavani, S. (2013). Fundamentals of Digital System Design Using VHDL and DSCH3. i-manager’s Journal on Computer Science, 1(1), 16-21. https://doi.org/10.26634/jcom.1.1.2275

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