This paper presents the design and hardware implementation of a Gaussian filter using approximate computing techniques to achieve efficient and resource-optimized image processing. Conventional Gaussian filters rely on exact arithmetic units, which increase hardware complexity and power consumption. To address this, the proposed architecture employs approximate adders and multipliers, reducing computational overhead while maintaining acceptable image quality. The design was implemented on the FPGA platform and evaluated across different noisy image datasets, including Gaussian noise, salt-and-pepper noise, and high-frequency images. Experimental results demonstrate significant reductions in hardware resource utilization, with notable improvements in delay. Furthermore, quantitative analysis of image quality metrics such as PSNR, MSSIM, MAE, and MSE confirmed that the approximate Gaussian filter preserved structural details and, in several cases, enhanced noise suppression compared to the exact filter. The results highlight the suitability of approximate arithmetic for embedded and real-time image processing applications, making this work a promising contribution toward energy-efficient and high-performance image processing systems.