This work proposes investigation on symmetrical three phase hybrid cascaded multilevel inverter topology with reduced number of switches and is able to create five level output. The main advantage of the proposed work is to reduce the number of switches when compared to the Cascaded Multi Level Inverter (CMLI). The reduced number of switches reduces the switching losses and improves the efficiency of the inverter. The variation of Total Harmonic Distortion (THD) in the inverter output voltage is observed for various modulation indices. Simulation is performed using MATLAB-SIMULINK. By comparing the various PWM techniques, such as COPWM-1, COPWM-2, COPWM-3 and COPWM-4, it is observed that Carrier Overlapping Pulse Width Modulation-3 (COPWM-3) provides output with relatively low distortion for all strategies and better DC bus utilization is obtained in (COPWM-1) and also comparing the various variable amplitude techniques, such as  VACOPWM-1, VACOPWM-2, VACOPWM-3 and VACOPWM-4, it is observed that Variable Amplitude Carrier Overlapping Pulse Width Modulation-3 (VACOPWM-3) provides output with relatively low distortion for all strategies and better DC bus utilization. Finally comparing the various PWM techniques with  the various variable amplitude techniques, It is observed that Variable Amplitude Carrier Overlapping Pulse Width Modulation-3 (VACOPWM-3) provides output with relatively low distortion for all strategies and better DC bus utilization is obtained in (VACOPWM-2).

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Investigation on Symmetrical Three Phase Hybrid Cascaded Multilevel Inverter With Reduced Number of Switches

V. Vidhya*, C. R. Balamurugan**, S. P. Natarajan***
*PG Student, Department of EEE, Arunai Engineering College, Tiruvannamalai, India.
** Department of EEE, Arunai Engineering College, Tiruvannamalai, India.
*** Department of EIE, Annamalai University, Chidambaram, India.
Periodicity:January - March'2013
DOI : https://doi.org/10.26634/jee.6.3.2174

Abstract

This work proposes investigation on symmetrical three phase hybrid cascaded multilevel inverter topology with reduced number of switches and is able to create five level output. The main advantage of the proposed work is to reduce the number of switches when compared to the Cascaded Multi Level Inverter (CMLI). The reduced number of switches reduces the switching losses and improves the efficiency of the inverter. The variation of Total Harmonic Distortion (THD) in the inverter output voltage is observed for various modulation indices. Simulation is performed using MATLAB-SIMULINK. By comparing the various PWM techniques, such as COPWM-1, COPWM-2, COPWM-3 and COPWM-4, it is observed that Carrier Overlapping Pulse Width Modulation-3 (COPWM-3) provides output with relatively low distortion for all strategies and better DC bus utilization is obtained in (COPWM-1) and also comparing the various variable amplitude techniques, such as  VACOPWM-1, VACOPWM-2, VACOPWM-3 and VACOPWM-4, it is observed that Variable Amplitude Carrier Overlapping Pulse Width Modulation-3 (VACOPWM-3) provides output with relatively low distortion for all strategies and better DC bus utilization. Finally comparing the various PWM techniques with  the various variable amplitude techniques, It is observed that Variable Amplitude Carrier Overlapping Pulse Width Modulation-3 (VACOPWM-3) provides output with relatively low distortion for all strategies and better DC bus utilization is obtained in (VACOPWM-2).

Keywords

THD, VA, CMLI, PWM, CF, FF, DF.

How to Cite this Article?

Vidhya, V., Balamurugan, C. R., and Natarajan, S. P. (2013). Investigation on Symmetrical Three Phase Hybrid Cascaded Multilevel Inverter with Reduced Number of Switches. i-manager’s Journal on Electrical Engineering, 6(3), 1-10. https://doi.org/10.26634/jee.6.3.2174

References

[1]. Corzine, K.A., Wielebski,M.W., Peng, F.Z & Wang, J. (2003). Control of Cascaded Multi-Level Inverters. IEEE Conference:0-7803-7817-2/03/2003, 1549-1555.
[2]. Radan, A., Shahirinia, A.H & Falahi, M. (2007). Evaluation of Carrier-Based PWM Methods for Multi-level Inverters. IEEE Conference: 1-4244-0755-9/07/2007, 389-394.
[3]. Arab Tehrani, K., Andriatsioharana, H., Rasoanarivo, I & Sargos, F.M. (2008). A Novel Multilevel Inverter Model. IEEE Conference: 978-1-4244-1668-4/08/2008, 1688-1693.
[4]. Lezana, P., Rodríguez, J & Oyarzún, D.A. (2008, March). Cascaded Multilevel Inverter With Regeneration Capability and Reduced Number of Switches. IEEE Transactions on Industrial Electronics, 55(3), 1059-1066.
[5]. Santhi. B & Natarajan, S.P. (2008, December). Carrier Overlapping PWM methods for Single Phase Cascaded Multilevel Inverter. International Journal of Science and Techniques of Automatic Control and Computer Engineering, IJ-STA, special Issue, CEM, 590-601.
[6]. Pan, Z & Peng, F.Z. (2009). A Sinusoidal PWM Method With Voltage Balancing Capability for Diode-Clamped Five-Level Converters. IEEE Transactions On Industry Applications, 45(3), 1028-1034.
[7]. Caballero, D.R., Martinez, L., Ramos, R & Mussa, S.A. (2009). New Asymmetrical Hybrid Multilevel Voltage Inverter. IEEE Conference, 978-1-4244-3370-4/09/2009, 354-361.
[8]. Konstantinou, G.S., & Agelidis, V.G.(2009). Performance Evaluation of Half-Bridge Cascaded Multilevel Converters Operated with Multicarrier Sinusoidal PWM Techniques. IEEE Conference, 978-1-4244-2800-7/09/2009, 3399-3404.
[9]. Ramkumar, S., Thamizharasan, S & Kamaraj, V. (2009). A Novel Variable Amplitude Carrier Band Control Strategy for Single Phase Cascaded Sources Inverter. IEEE Conference, 978-1-4244-3557-9/09/2009, 373-376.
[10]. Konstantinou,Pulikanti & Agelidis, (2010). Harmonic Elimination Control of a Five-Level DC-AC Cascaded H-bridge Inverter. IEEE Conference, 978-1-4244-5670-3/10/2010, 352-357.
[11]. Malinowski, M., Gopakumar, K., Rodriguez, J & Pérez, A.M. (2010, July). A Survey on Cascaded Multilevel Inverters. IEEE transactions on Industrial Electronics, 57(7), 2197-2206.
[12]. Caballero, D.R., Sanhueza, R & Heldwein, M.L. (2011). Symmetrical hybrid multilevel inverter concept based on multi-stage switching cells. IEEE Conference, 978-4577-1646-1/11/2011, 776-781.
[13]. Najafi, E & Mohamed Yatim, A.H. (2012). Design and Implementation of a New Multilevel Inverter Topology. IEEE Transactions on Industrial Electronics, 59(1), 4148-4154.
[14]. Balamurugan, C.R., Natarajan, S.P & Bensraj, R. (2012, June). Comparative Study on Carrier Overlapping PWM Strategies for Three Phase Five Level Cascaded Inverter. International Journal of Computer Applications, 48(6), 20-28.
[15]. Roshankumar, P., Rajeevan, P.P., Mathew, K., Gopakumar, K., Leon, J & Franquelo, L.G. (2012, August). A Five Level Inverter Topology with Single – DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge. IEEE Transactions on Power Electronics, 27(8), 3505-3512.
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