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Analysis of Carbon Nanotube for Low Power Nano Electronics Applications

Pradeep Singh Yadav*, Chinmay Chandrakar**, Anil Kumar Sahu***

* Shri Shankaracharya Technical Campus, Bhilai, India.

** Rungta College of Engineering and Technology, Bhilai, India.

*** Bharat Institute of Engineering and Technology, Hyderabad, Telangana, India.

Periodicity:July - December'2023
DOI : https://doi.org/10.26634/jcir.11.2.20311

Abstract

In the area of nanotechnology, carbon nanotubes are a notable and remarkable invention. Its structure is much similar to the structure of graphite. CNTs are small in size, light in weight, have good strength, and have good conductivity, making them the building blocks of futuristic new technologies. CNTs have promised to be the catalyst for the next revolution in technology. A broad range of processes are available to produce various types of CNTs, depending on the rolling times of graphite sheets. In this paper, different types of CNTs, their properties, ways of synthesis such as the arc discharge method and chemical vapor deposition, and application have been covered. Outlining their respective advantages and challenges. SWCNTs exhibit high carrier mobilities and tunable bandgaps, making them suitable for transistor devices and interconnects in integrated circuits. DWCNTs offer enhanced mechanical stability and electrical conductivity, catering to applications in flexible electronics and energy storage devices. MWCNTs, though lacking distinct properties of SWCNTs and DWCNTs, find utility in composites, sensors, and biomedical devices due to their ease of synthesis and lower cost.

Keywords

Low Power Nano Electronics, Carbon Nanotubes, Arc Discharge Method, Chemical Vapor Deposition, SWCNTs, DWCNTs, MWCNTs.

How to Cite this Article?

Yadav, P. S., Chandrakar, C., and Sahu, A. K. (2023). Analysis of Carbon Nanotube for Low Power Nano Electronics Applications. i-manager’s Journal on Circuits and Systems, 11(2), 36-44. https://doi.org/10.26634/jcir.11.2.20311

References

[1]. Arunkumar, T., Karthikeyan, R., Ram Subramani, R., Viswanathan, K., & Anish, M. (2020). Synthesis and characterisation of multi-walled carbon nanotubes (MWCNTs). International Journal of Ambient Energy, 41(4), 452-456.

[2]. Azimi, N., Hoseini, H., & Shahsavari, A. (2014). Designing a novel ternary multiplier using CNTFET. International Journal of Modern Education and Computer Science (IJMECS), 6(11), 45-51.

[3]. Charmchi, N., & Reshadinezhad, M. (2015). A Novel High-speed Two-operand Multiplier using CNFET Technology. International Journal of Advanced Information Science and Technology, 43(43), 14-19.

[4]. Das, D., Banerjee, A., & Prasad, V. (2018, March). Design of ternary logic circuits using CNTFET. In 2018 International Symposium on Devices, Circuits and Systems (ISDCS) (pp. 1-6). IEEE.

[5]. Gavaber, M. D., Poorhosseini, M., & Pourmozafari, S. (2019). Novel architecture for low-power CNTFET-based compressors. Journal of Circuits, Systems and Computers, 28(12), 1950207.

[6]. Hiremath, S., & Koppad, D. (2014). Low power circuits using modified gate diffusion input (GDI). IOSR Journal of VLSI and signal Processing (IOSR-JVSP), 4(5), 70-76.

[7]. Jaber, R. A., Owaidat, B., Kassem, A., & Haidar, A. M. (2020, December). A novel low-energy CNTFET-based ternary half-adder design using unary operators. In 2020 International Conference on Innovation and Intelligence for Informatics, Computing and Technologies (3ICT) (pp. 1-6). IEEE.

[8]. Kim, Y. A., Muramatsu, H., Hayashi, T., Endo, M., Terrones, M., & Dresselhaus, M. S. (2006). Fabrication of high purity, double walled carbon nanotube buckypaper. Chemical Vapor Deposition, 12(6), 327-330.

[9]. Kim, Y. A., Yang, K. S., Muramatsu, H., Hayashi, T., Endo, M., Terrones, M., & Dresselhaus, M. S. (2014). Double-walled carbon nanotubes: Synthesis, structural characterization, and application. Carbon Letters, 15(2), 77-88.

[10]. Mohammaden, A., Fouda, M. E., Alouani, I., Said, L. A., & Radwan, A. G. (2022). CNTFET-based ternary multiply-and-accumulate unit. Electronics, 11(9), 1455.

[11]. Murotiya, S. L., & Gupta, A. (2013). Design and analysis of CNTFET based D-Flip-Flop. International Journal of Electronics and Communication Engineering & Technology (IJECET), 4(7), 144-149.

[12]. Murotiya, S. L., Gupta, A., & Pandit, A. (2014, September). CNTFET-based low power design of 4-input ternary XOR function. In 2014 International Conference on Computer and Communication Technology (ICCCT) (pp. 347-350). IEEE.

[13]. Nanot, S., Thompson, N. A., Kim, J. H., Wang, X., Rice, W. D., Hároz, E. H., ... & Kono, J. (2013). Single-walled carbon nanotubes. Springer Handbook of Nanomaterials, (pp. 105-146).

[14]. Ossilaenabling materials science. (2020). Multi-Walled Carbon Nanotubes.

[15]. Prasad, V., Banerjee, A., & Das, D. (2022). Design of ternary encoder and decoder using CNTFET. International Journal of Electronics, 109(1), 135-151.

[16]. Sankar, P. G. (2018, December). A Novel Ternary Half Adder & One Bit Multiplier Circuits based on Emerging sub-32nm FET Technology. In 2018 International Conference on Intelligent Computing and Communication for Smart World (I2C2SW) (pp. 198-203). IEEE.

[17]. Sankar, P. G., & Kumar, K. U. (2011). Mechanical and electrical properties of single walled carbon nanotubes: a computational study. European Journal of Scientific Research, 60(3), 342-358.

[18]. Sankar, P. G., & Kumar, K. U. (2012, March). Investigating the effect of chirality on coaxial carbon nanotube field effect transistor. In 2012 International Conference on Computing, Electronics and Electrical Technologies (ICCEET) (pp. 663-671). IEEE.

[19]. Sardroudi, F. M., Habibi, M., & Moaiyeri, M. H. (2021). CNFET-based design of efficient ternary half adder and 1-trit multiplier circuits using dynamic logic. Microelectronics Journal, 113, 105105.

[20]. Shahrom, E., & Hosseini, S. A. (2018). A new low power multiplexer based ternary multiplier using CNTFETs. AEU - International Journal of Electronics and Communications, 93, 191-207.

[21]. Varshney, K. (2014). Carbon nanotubes: A review on synthesis, properties and applications. International Journal of Engineering Research and General Science, 2(4), 660-677.

[22]. Vudadha, C., Katragadda, S., & Phaneendra, P. S. (2013, December). 2: 1 Multiplexer based design for ternary logic circuits. In 2013 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) (pp. 46-51). IEEE.

Analysis of Carbon Nanotube for Low Power Nano Electronics Applications

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