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Design and Implementation of Systolic Architecture Based FIR FilterDesign and Implementation of Systolic Architecture Based FIR Filter

P. Pushpalatha*, K. Babulu**

*-** Department of Electronics and Communication Engineering, University College of Engineering, Jawaharlal Nehru Technological University, Kakinada, Andhra Pradesh, India.

Periodicity:January - June'2022
DOI : https://doi.org/10.26634/jdp.10.1.18852

Abstract

In signal processing, a filter is a device or process that removes some unwanted components or features from a signal. Digital filters are mainly divided into Infinite Impulse Response (IIR) filters and Finite Impulse Response (FIR) filters. FIR filters are mostly used in applications like image processing, communications, Digital Signal Processing (DSP) etc. One of the most used filters for designing of VLSI circuits is FIR filter. Systolic architecture is a Processing Element (PE) network that generates and passes data rhythmically through the system. The concept of systolic architecture can map high-level computing into hardware structures. FIR filter with systolic architectures provide better examples for efficient VLSI and FPGA implementations of many digital signal processing applications because of their modularity and regularity features.

Keywords

FIR Filters, Systolic Design, Pipelining, Digital Signal Processing.

How to Cite this Article?

Pushpalatha, P., and Babulu, K. (2022). Design and Implementation of Systolic Architecture Based Fir Filter. i-manager’s Journal on Digital Signal Processing, 10(1), 17-23. https://doi.org/10.26634/jdp.10.1.18852

References

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Design and Implementation of Systolic Architecture Based FIR FilterDesign and Implementation of Systolic Architecture Based FIR Filter

Abstract

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