i-manager Publications

FPGA Based Control and Protection Unit of a Multichannel Pulsed Power Supply for Solid State RF Amplifiers

Akhilesh Tripathi*, Amrita Singh **, Sachin Rathi ***, Rinki Upadhyay ****, M. K. Badapanda *****, Mahendra Lad******

*,***-***** RF Systems Division, Raja Ramanna Centre for Advanced Technology, Indore, India.

** Banasthali Vidyapith, Tonk, Rajasthan, India.

Periodicity:April - June'2020
DOI : https://doi.org/10.26634/jee.13.4.17638

Abstract

This article presents an FPGA based control and protection unit employing Xilinx make Spartan-6 XC6SLX9TQG144C FPGA for driving a multichannel pulsed power supply of pulsed solid state RF amplifiers. The control unit generates synchronized drive pulses for driving 24 units of 50 V, 80 A pulsed output channels of the multichannel pulsed power supply. The pulse width and frequency of drive pulses are settable from 100 μs to 2.5 ms and from 1 Hz to 50 Hz respectively. Over-current protection of output channels is implemented through its protection unit. The FPGA has been programmed in VHDL for pulse generation, control of pulse parameters and over current protection of pulsed output channels. The schematics, simulation results and RTL schemes are presented in this paper. This control and protection unit is integrated with 24 numbers of 50 V, 80 A pulsed output channels which are simultaneously tested up to 80 A peak current and experimental results are also presented in this paper. The rise time and fall time of output pulse are observed as < 20 μs and voltage droop is observed as < 0.5%. Typical jitter among output pulses of different pulsed output channels is observed as 60 ns.

Keywords

Pulsed Power Supply, Solid State RF Amplifiers, FPGA, VHDL Program, Signal Processing.

How to Cite this Article?

Tripathi, A., Singh, A., Rathi, S., Upadhyay, R., Badapanda, M. K., and Lad, M. (2020). FPGA Based Control and Protection Unit of a Multichannel Pulsed Power Supply for Solid State RF Amplifiers. i-manager's Journal on Electrical Engineering, 13(4), 49-60. https://doi.org/10.26634/jee.13.4.17638

References

[1]. Badapanda, M. K., Upadhyay, R., Tripathi, A., Tyagi, R. K., & Lad, M. (2015). Modular hot swappable 50 V, 700 A DC power supply with active redundancy. In Proceedings of the Seventh DAE-BRNS Indian Particle Accelerator Conference: Book of Abstracts.

[2]. Bianchi, V., & De Munari, I. (2020). A modular Vedic Multiplier architecture for Model-Based design and deployment on FPGA platforms. Microprocessors and Microsystems, 76, 103106. https://doi.org/10.1016/j.mic pro.2020.103106

[3]. Bouldin, D., Snapp, W., Haug, P., Sunderland, D., Brees, R., Sechen, C., & Dai, W. (2004). ASIC by design: Automated design of digital signal processing applicationspecific integrated circuits. IEEE Circuits and Devices Magazine, 20(4), 17-21. https://doi.org/10.1109/MCD.20 04.1317946

[4]. Chowdhury, S. R., Chakrabarti, D., & Saha, H. (2008). FPGA realization of a smart processing system for clinical diagnostic applications using pipelined datapath architectures. Microprocessors and Microsystems, 32(2), 107-120. https://doi.org/10.1016/j.micpro.2007.12.001

[5]. Deo, R. K., Anghore, G., Jain, M. K., & Lad, M. (2018). Design and development of 3 kW pulsed solid-state RF power amplifier using two LDMOS in parallel configuration at 1 MHz. Journal of Instrumentation, 13(12), T12002. https://doi.org/10.1088/1748-0221/13/12/t12002

[6]. Herbordt, M. C., VanCourt, T., Gu, Y., Sukhwani, B., Conti, A., Model, J., & DiSabello, D. (2007). Achieving high performance with FPGA-based computing. Computer, 40(3), 50-57. https://doi.org/10.1109/MC.2007.79

[7]. Janky, F. N., & Varga, P. (2018). Time synchronization solution for FPGA-based distributed network monitoring. Info Communications Journal, IEEE, 10(1), 1-9.

[8]. Kumrawat, A., Saichand, K., & John, V. (2013, November). Design of AC-DC control power supply with wide input voltage variation. In 2013 IEEE Innovative Smart Grid Technologies - Asia (ISGT Asia) (pp. 1-6). IEEE. https:// doi.org/10.1109/ISGT-Asia.2013.6698779

[9]. Larsen, E., Valdes, M., Fox, G. H., Rempe, K., & Walker, C. G. (2016, May). IEEE 3004.5 recommended practice for the application of low-voltage circuit breakers in industrial and commercial power systems. In 2016, IEEE/IAS 52nd Industrial and Commercial Power Systems Technical Conference (I&CPS) (pp. 1-9). IEEE. https://doi.org/10.11 09/ICPS.2016.7490261

[10]. Li, M., Zhang, P., & Luan, M. (2018, July). Design of high-speed ppm signal synchronization based on FPGA. In 2018, 10th International Conference on Communication Software and Networks (ICCSN) (pp. 365-370). IEEE. https:// doi.org/10.1109/ICCSN.2018.8488225

[11]. MacLean, W. J. (2005, September). An evaluation of the suitability of FPGAs for embedded vision systems. In 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR'05) - Workshops (pp. 131-131). IEEE. https://doi.org/10.1109/CVPR.2005.408

[12]. Maerani, R., Mayaka, J., El Akrat, M., & Cheon, J. J. (2018, February). V & V plan for FPGA-based ESF-CCS using system engineering approach. Journal of Physics Conference Series, 962(1), 012007. https://doi.org/10. 1088/1742-6596/962/1/012007

[13]. Mekala, P., & Fan, J. (2011). Design enhancement of combinational neural networks using HDL based FPGA framework for pattern recognition. i-manager's Journal on Electronics Engineering, 2(1), 6-16. https://doi.org/10.266 34/jele.2.1.1574

[14]. Monmasson, E., Idkhajine, L., Cirstea, M. N., Bahri, I., Tisan, A., & Naouar, M. W. (2011). FPGAs in industrial control applications. IEEE Transactions on Industrial Informatics, 7(2), 224-243. https://doi.org/10.1109/TII.2011.2123908

[15]. Roy, A., Sharma, L., Chakraborty, I., Panja, S., Ojha, V. N., & De, S. (2019). An FPGA based all-in-one function generator, lock-in amplifier and auto-relockable PID system. Journal of Instrumentation, 14(05), P05012.

[16]. Torquato, M. F., & Fernandes, M. A. (2019). Highperformance parallel implementation of genetic algorithm on FPGA. Circuits, Systems, and Signal Processing, 38(9), 4014-4039. https://doi.org/10.1007/s00 034-019-01037-w

[17]. Tripathi, A., Badapanda, M. K., Upadhyay, R., Tyagi, R. K., & Lad, M. (2018). Development of 50 V, 640 A pulse power supply for solid state RF amplifiers. In Proceedings of the Eighth DAE-BRNS Indian Particle Accelerator Conference.

[18]. Xilinx, (2011). ISE In-Depth Tutorial - UG695, v13.3. https://www.xilinx.com/support/documentation/sw_manu als/xilinx13_3/ise_tutorial_ug695.pdf

If you have access to this article please login to view the article or kindly login to purchase the article

Single Article

	North Americas,UK, Middle East,Europe		India	Rest of world
	USD	EUR	INR	USD-ROW
Online	15	15

ADD TO CART

Options for accessing this content:

If you would like institutional access to this content, please recommend the title to your librarian.
If you already have i-manager's user account: Login above and proceed to purchase the article.
New Users: Please register, then proceed to purchase the article.