References
[1]. Akers, L. A. (1986). The inverse-narrow-width effect. IEEE
Electron Device Letters, 7(7), 419-421. https://doi.org/
10.1109/EDL.1986.26422
[2]. Alioto, M. (2010). Understanding DC behavior of
subthreshold CMOS logic through closed-form analysis.
IEEE Transactions on Circuits and Systems I: Regular Papers,
57(7), 1597-1607. https://doi.org/10.1109/TCSI.2009.2034
233
[3]. Calhoun, B. H., & Chandrakasan, A. (2004, August).
Characterizing and modeling minimum energy operation
for subthreshold circuits. In Proceedings of the 2004
International Symposium on Low Power Electronics and
Design (pp. 90-95).
[4]. Chang, I. J., Park, S. P., & Roy, K. (2010). Exploring
asynchronous design techniques for process-tolerant and
energy-efficient subthreshold operation. IEEE Journal of
Solid-State Circuits, 45(2), 401-410. https://doi.org/10.1
109/JSSC.2009.2036764
[5]. Frustaci, F., Corsonello, P., & Perri, S. (2012). Analytical
delay model considering variability effects in subthreshold
domain. IEEE Transactions on Circuits and Systems II:
Express Briefs, 59(3), 168-172. https://doi.org/10.1109/
TCSII.2012.2184377
[6]. Hwang, M. E., Raychowdhury, A., Kim, K., & Roy, K.
(2007, June). A 85mV 40nW process-tolerant subthreshold
8×8 FIR filter in 130nm technology. In 2007 IEEE Symposium
on VLSI Circuits (pp. 154-155). IEEE. https://doi.org/10.1109/
VLSIC.2007.4342695
[7]. Kim, T. H., Keane, J., Eom, H., & Kim, C. H. (2007).
Utilizing reverse short-channel effect for optimal
subthreshold circuit design. IEEE Transactions on Very Large
Scale Integration (VLSI) Systems, 15(7), 821-829.
https://doi.org/10.1109/TVLSI.2007.899239
[8]. Klinefelter, A. M., Zhang, Y., Otis, B., & Calhoun, B. H.
(2012). A programmable 34 nW/channel sub-threshold
signal band power extractor on a body sensor node SoC.
IEEE Transactions on Circuits and Systems II: Express Briefs,
59(12), 937-941. https://doi.org/10.1109/TCSII.2012.2231
041
[9]. Kwong, J., & Chandrakasan, A. P. (2006, October).
Variation-driven device sizing for minimum energy subthreshold
circuits. In Proceedings of the 2006 International
Symposium on Low Power Electronics and Design (pp. 8-
13). https://doi.org/10.1145/1165573.1165578
[10]. Li, M. Z., Ieong, C. I., Law, M. K., Mak, P. I., Vai, M. I., &
Martins, R. P. (2013, July). Sub-threshold standard cell library
design for ultra-low power biomedical applications. In
th 2013 35 Annual International Conference of the IEEE
Engineering in Medicine and Biology Society (EMBC) (pp.
1454-1457). IEEE. https://doi.org/10.1109/EMBC.2013.6
609785
[11]. Liu, B., De Gyvez, J. P., & Ashouei, M. (2013). Subthreshold
standard cell sizing methodology and library
comparison. Journal of Low Power Electronics and
Applications, 3(3), 233-249. https://doi.org/10.3390/jlpea
303233
[12]. Ma, W. H., Kao, J. C., Sathe, V. S., & Papaefthymiou,
M. C. (2010). 187 MHz subthreshold-supply chargerecovery
FIR. IEEE Journal of Solid-State Circuits, 45(4), 793-
803. https://doi.org/10.1109/JSSC.2010.2042247
[13]. Reynders, N., & Dehaene, W. (2012). Variation-resilient
building blocks for ultra-low-energy sub-threshold design.
IEEE Transactions on Circuits and Systems II: Express Briefs,
59(12), 898-902. https://doi.org/10.1109/TCSII2012.22310
22
[14]. Sutherland, I., Sproull, R. F., Sproull, B., & Harris, D.
(1999). Logical Effort: Designing Fast CMOS Circuits.
Morgan Kaufmann.
[15]. Tajalli, A., & Leblebici, Y. (2011). Design trade-offs in
ultra-low-power digital nanoscale CMOS. IEEE Transactions
on Circuits and Systems I: Regular Papers, 58(9), 2189-
2200. https://doi.org/10.1109/TCSI.2011.2112595
[16]. Wang, J. M., Fang, S. C., & Feng, W. S. (1994). New
efficient designs for XOR and XNOR functions on the
transistor level. IEEE Journal of Solid-State Circuits, 29(7),
780-786. https://doi.org/10.1109/4.303715
[17]. Zhang, F., Mishra, A., Richardson, A. G., Zanos, S., &
Otis, B. P. (2010, September). A low-power multi-band
ECoG/EEG interface IC. In IEEE Custom Integrated Circuits
Conference 2010 (pp. 1-4). IEEE. https://doi.org/
10.1109/CICC.2010.5617607
[18]. Zhou, J., Jayapal, S., Busze, B., Huang, L., & Stuyt, J.
(2012). A 40 nm dual-width standard cell library for
near/sub-threshold operation. IEEE Transactions on Circuits
and Systems I: Regular Papers, 59(11), 2569-2577.
https://doi.org/10.1109/TCSI.2012.2190674