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FPGA Implementation of Radix-2 FFT Processor Based on CORDIC Algorithm for Electromyography

Anju M. I.*, J. Mohan **, Beena M. I.***

* Department of Electronics and Communication Engineering, New Prince College of Engineering and Technology, Chennai, Tamil Nadu, India.

** Department of Electronics and Communication Engineering, SRM Valliammai College of Engineering, Chennai, Tamil Nadu, India.

*** Department of Mathematics, Ezuthachan College of Pharmaceutical Sciences, Thiruvananthapuram, Kerala, India.

Periodicity:April - June'2019
DOI : https://doi.org/10.26634/jdp.7.2.16828

Abstract

Electromyography (EMG) is a diagnostic technique for determining the health status of the muscles and the motor neurons that regulate them. It transmits electrical signals that cause muscles to contract and relax. An EMG translates these signals into graphs or numbers and help the doctors to make diagnosis. The electric signal transmitted by the muscles will have lot of noises. Fast Fourier Transform is one of the most used algorithms for calculating the Discrete Fourier Transform (DFT). It's because of its reduction in computing time and better efficiency. A radix-2 FFT allows to analyze dynamic signals coming through muscle contractions efficiently and same can be precisely implemented using radix-4 Coordinate Rotation Digital Computer (CORDIC) algorithm. Here it deals with the calculation of muscle fatigue using EMG and proposes an ideal FFT core implementation using CORDIC algorithm as a solution for the same.

Keywords

Electromyography, Discrete Fourier Transform, Coordinate Rotation Digital Computer, Surface Electromyography, Fast Fourier Transforms

How to Cite this Article?

Anju, M. I., Mohan, J., and Beena, M. I. (2019). FPGA Implementation of Radix-2 FFT Processor Based on Cordic Algorithm for Electromyography. i-manager’s Journal on Digital Signal Processing. 7(2), 15-24. https://doi.org/10.26634/jdp.7.2.16828

References

[1]. Ali, A. A., Albarahany, & Quan, L. (2012, October). EMG signals detection technique in voluntary muscle movement. In 2012 6^th International Conference on New Trends in Information Science, Service Science and Data Mining (ISSDM2012) (pp. 738-742). IEEE.

[2]. Ali, A., Kanagasabapathi, C., & Yellampalli, S. S. (2017, December). Pipelined-scalable FFT core with optimized custom floating point engine for OFDM system. In 2017 International Conference on Electrical, Electronics, Communication, Computer, and Optimization Techniques (ICEECCOT) (pp. 1-6). IEEE. https://doi.org/10.1109/ICEECCOT.2017.8284590

[3]. Bansal, P., Dhaliwal, B. S., & Gill, S. S. (2014, March). Memory-efficient Radix-2 FFT processor using CORDIC algorithm. In 2014 International Conference on Green Computing Communication and Electrical Engineering (ICGCCEE) (pp. 1-5). IEEE. https://doi.org/10.1109/ICG CCEE.2014.6922202

[4]. Belabed, T., Jemmali, S., & Souani, C. (2018, March). FFT implementation and optimization on FPGA. In 2018 4^th International Conference on Advanced Technologies for Signal and Image Processing (ATSIP) (pp. 1-6). IEEE https://doi.org/10.1109/ATSIP.2018.8364454

[5]. CORDIC FAQ. (n.d.). Retrieved from https://dspguru. com/dsp/faqs/cordic/

[6]. Han, W., Erdogan, A. T., Arslan, T., & Hasan, M. (2005, January). The development of high performance FFT IP Cores through hybrid low power algorithmic methodology. In Proceedings of the 2005 Asia and South Pacific Design Automation Conference (pp. 549-552). ACM. https://doi.org/10.1145/1120725.1120959

[7]. He, S., & Torkelson, M. (1996, April). A new approach to pipeline FFT processor. In Proceedings of International Conference on Parallel Processing (pp. 766-770). IEEE. https://doi.org/10.1109/IPPS.1996.508145

[8]. Joseph, E., Rajagopal, A., & Karibasappa, K. (2012, December). FPGA implementation of Radix-2 FFT processor based on Radix-4 CORDIC. In 2012 Nirma University International Conference on Engineering (NUiCONE) (pp. 1-6). IEEE. https://doi.org/10.1109/ NUICONE.2012.6493231

[9]. Kannan, M., & Srivatsa, S. K. (2007). Low power hardware implementation of high speed FFT core. Journal of Computer Science, 3(6), 376-382. https://doi.org/10.3844/jcssp.2007.376.382

[10]. Liu, X., Yu, F., & Wang, Z. K. (2011). A pipelined architecture for normal I/O order FFT. Journal of Zhejiang University Science C, 12(1), 76-82. https://doi.org/10.16 31/jzus.C1000234

[11]. Nazmi, N., Rahman, M. A. A., Mazlan, S. A., Zamzuri, H., & Mizukawa, M. (2015, March). Electromyography (EMG) based signal analysis for physiological device application in lower limb rehabilitation. In 2015 2^nd International Conference on Biomedical Engineering (ICoBE) (pp. 1-6). IEEE. https://doi.org/10.1109/ICoBE. 2015.7235878

[12]. Rani, S., Sarma, T. C., & Prasad, K. S. (2012). Text file encryption using FFT technique in Lab VIEW 8.6. IJRET: International Journal of Research in Engineering and Technology, 1(01), 2319-1163.

[13]. Saenz, S. J., Cisneros, S. O., & Dominguez, J. R. (2015, November). FPGA design and implementation of radix-2 fast Fourier transform algorithm with 16 and 32 points. In 2015 IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC) (pp. 1-6). IEEE. https://doi.org/10.1109/ROPEC.2015.7395113

[14]. Tang, A., Yu, L., Han, F., & Zhang, Z. (2016, March). CORDIC-based FFT real-time processing design and FPGA implementation. In 2016 IEEE 12^th International Colloquium on Signal Processing & Its Applications (CSPA) (pp. 233-236). IEEE. https://doi.org/10.1109/CSPA.2016. 7515837

[15]. Wold, E. H., & Despain, A. M. (1984). Pipeline and parallel-pipeline FFT processors for VLSI implementations. IEEE Transactions on Computers, 33(5), 414-426. https://doi.org/10.1109/TC.1984.1676458

[16]. Zhou, B., Peng, Y., & Hwang, D. (2009). Pipeline FFT architectures optimized for FPGAs. International Journal of Reconfigurable Computing, 2009, 1-9. https://doi.org/10.1155/2009/219140

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