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Radar Pulse Compression Waveform Generation using FPGA Implementation

V. Narendra Reddy*, V. Lavanya **, B. Kiranmai***

*-** Department of Electronics and Communication, Maharaj Vijayaram Gajapathi Raj College of Engineering (Autonomous), Vizianagaram, Andhra Pradesh, India.

*** Department of Electronics and Communication Engineering, Lendi Institute of Engineering and Technology (Autonomous), Vizianagaram, Andhra Pradesh, India.

Periodicity:April - June'2019
DOI : https://doi.org/10.26634/jdp.7.2.16790

Abstract

Pulse Compression (PC) techniques are utilized to obtain long range detection and better range resolution abilities in radar systems. Its implementation requires optimized and dedicated hardware. The real time implementation of this hardware have several constraints such as area occupied, power consumption, etc. This paper focus on designing an optimized structure, which can reduce area and power consumption. To provide flexibility in reconfiguration of this Linear Frequency Modulated (LFM) PC sequence has been generated on Field-Programmable Gate Array (FPGA) logic on Very Large Scale Integration (VLSI) architecture. It was found that the proposed structure has generated the LFM pulse compression sequences efficiently while improving some of the parameters like area, power consumption and delay when compared to previous methods.

Keywords

LFM, Pulse compression, VLSI architecture, FPGA

How to Cite this Article?

Reddy, V. N., Lavanya, V., and Kiranmai, B. (2019). Radar Pulse Compression Waveform Generation using FPGA Implementation. i-manager’s Journal on Digital Signal Processing. 7(2), 40-43. https://doi.org/10.26634/jdp.7.2.16790

References

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