i-manager Publications

FPGA Based Implementation of Median Filter using Compare and Exchange Unit

Boni Srinu *, Srinu Bevara**, Nagendra Kumar M.***

* Department of Electronics and Communication Engineering, Lendi Institute of Engineering and Technology (A), Andhra Pradesh, India.

** Department of Information Technology, Gayatri Vidya Parishad College of Engineering (A), Visakhapatnam, Andhra Pradesh, India.

*** Department of Electronics and Communication Engineering, MVGR College of Engineering (A), Vizianagaram, Andhra Pradesh, India.

Periodicity:January - March'2019
DOI : https://doi.org/10.26634/jdp.7.1.16435

Abstract

Over the past few years, so many new solutions are gaining popularity in the software industry. All these solutions require a fast and parallel data manipulation. An attempt has been made to design median filter with high throughput and good latency to suppress the impulse based noise on real time signal and image processing applications. It is partially affected by the median filter and its bias of the input stream is directly above the average of mathematical analysis. An efficient VLSI suitable hardware implementation of a median filter is presented, that uses compare and exchange unit. The proposed hardware structure reduces the hardware requirements and has a faster processing speed, when compared with some other existing techniques. The input numbers or streams are used to construct an algorithm. By using this algorithm, the median number can be found out. The proposed technique can be implemented with perfect shuffle interconnects between active stages of compare and exchange elements. In this paper, all the designs are synthesized and created using MAX PLUS- II from ALTERA with f_max = 486.38 MHz.

Keywords

Median Filter, Sorting Network, Compare and Exchange Unit (CEU).

How to Cite this Article?

Srinu, B., Bevara, S., & Kumar, N. M. (2019). FPGA Based Implementation of Median Filter using Compare and Exchange Unit i-manager’s Journal on Digital Signal Processing, 7(1),33-38. https://doi.org/10.26634/jdp.7.1.16435

References

[1]. Astola, J. T., & Campbell, T. G. (1989). On computation of the running median. IEEE Transactions on Acoustics, Speech, and Signal Processing, 37(4), 572- 574. https://doi.org/10.1109/29.17539

[2]. Cadenas, J., Megson, G. M., Sherratt, R. S., & Huerta, P. (2012). Fast median calculation method. Electronics Letters, 48(10), 558-560. https://doi.org/10.1049/el. 2012.0343

[3]. Christopher, L. A., Mayweather, W. T., & Perlman, S. S. (1988). A VLSI median filter for impulse noise elimination in composite or component TV signals. IEEE Transactions on Consumer Electronics, 34(1), 262-267. https://doi.org/ 10.1109/30.75377

[4]. Fahmy, S. A., Cheung, P. Y., & Luk, W. (2005, August). Novel FPGA-based implementation of median and weighted median filters for image processing. In International Conference on Field Programmable Logic and Applications, 2005. (pp. 142-147). IEEE. https://doi.org/10.1109/FPL.2005.1515713

[5]. Hinton, H. S. (1987, January). Applications of the photonic switching technology for telecommunications switching. In 1987 IEEE International Conference on Communications (ICC) (pp. 1559-1564).

[6]. Huang, A. (1986, January). The relationship between STARLITE, A wideband digital switch and optics. In 1986 IEEE International Conference on Communications (ICC) (pp. 1739-1743).

[7]. Huang, T., Yang, G. J. T. G. Y., & Tang, G. (1979). A fast two-dimensional median filtering algorithm. IEEE Transactions on Acoustics, Speech, and Signal Processing, 27(1), 13-18. https://doi.org/10.1109/TASSP. 1979.1163188

[8]. Karaman, M., Onural, L., & Atalar, A. (1990). Design and implementation of a general-purpose median filter unit in CMOS VLSI. IEEE Journal of Solid-State Circuits, 25(2), 505-513. https://doi.org/10.1109/4.52178

[9]. Lohmann, A. W. (1986). What classical optics can do for the digital optical computer. Applied Optics, 25(10), 1543-1549. https://doi.org/10.1364/AO.25.001543

[10]. Midwinter, J. E. (1987). Novel approach to the design of optically activated wideband switching matrices. IEE Proceedings J-Optoelectronics, 134(5), 261-268. https://doi.org/10.1049/ip-j.1987.0044

[11]. Stirk, C. W., & Athale, R. A. (1988). Sorting with optical compare-and-exchange modules. Applied Optics, 27(9), 1721-1726. https://doi.org/10.1364/AO.27.001721

[12]. Teja, V. R., Ray, K. C., Chakrabarti, I., & Dhar, A. S. (2008, January). High throughput VLSI architecture for one dimensional median filter. In 2008 International Conference on Signal Processing, Communications and Networking (pp. 339-344). IEEE. https://doi.org/10.1109/ ICSCN.2008.4447215

[13]. Tukey, J. (1974). Nonlinear (nonsuperposable) methods for smoothing data. Congress Record (EASCO), 673.

[14]. Vasanth, K., Raj, S. N., Karthik, S., & Mol, P. P. (2010, December). FPGA implementation of optimized sorting network algorithm for median filters. In INTERACT-2010 (pp. 224-229). IEEE. https://doi.org/10.1109/INTERACT.2010. 5706144

FPGA Based Implementation of Median Filter using Compare and Exchange Unit

Abstract

Keywords

How to Cite this Article?

References

If you have access to this article please login to view the article or kindly login to purchase the article

Purchase Instant Access

Options for accessing this content:

	North Americas,UK, Middle East,Europe		India	Rest of world
	USD	EUR	INR	USD-ROW
Pdf	35	35	200	20
Online	35	35	200	15
Pdf & Online	35	35	400	25