Very Large Scale Integration (VLSI) is the science of integrating millions of transistors in a silicon chip. It is a term describing semiconductor integrated circuits composed of thousands of logic elements of memory cells. Error that occurs during the write and read operations in memory cells is a drawback for the memory ICs. Error detection and error correction plays a vital role in VLSI design by increasing the accuracy and performance of the desired circuits. Depending on the properties of the system, the channel coding can use either Automatic Repeat Request or Forward Error Correction technique in which the error correcting is introduced. In this work two techniques are used i.e. Reed Solomon code and Bose–Chaudhuri–Hocquenghem (BCH) code, where Reed Solomon code is a error detection technique which is mainly used for its possibility to adjust block length and symbol size. BCH code is a error correction technique, it is used because of its easy implementation. These two techniques are implemented in the memory cells and the performance metrics such as block length, minimum distance are calculated. From the VHDL simulation result, it is proved that BCH code is better than Reed Solomon code for the memory cells of the ICs.