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Investigate Sub-Threshold Performance Measures of Cylindrical Gate All Around MOSFET at Sub-Nanometer Regime

Tarun Kumar Sachdeva*, S. K. Aggarwal**, Alok K. Kushwaha***

* Research Scholar, Department of Electrical and Electronics Engineering, YMCAUST, Faridabad, India.

** Professor, Department of Electrical and Electronics Engineering, YMCAUST, Faridabad, India.

*** Professor and Assistant Dean (Academic), Waljat College of Applied Science, Muscat, Oman.

Periodicity:July - December'2017
DOI : https://doi.org/10.26634/jes.6.1.13889

Abstract

This paper investigates the effect of the work function on 45 nm gate length, cylindrical gate all around MOSFET and evaluates the short channel performance of the device using gate electrode work function analysis. In this work, the sensitivity of gate work function (φM) on various performance metrics like threshold voltage (V_t ), On current (I_ON ), subthreshold leakage current (I_OFF ), On-Off current ratio (I_ON /I_OFF ), Subthreshold slope and DIBL (Drain Induced Barrier Lowering) of cylindrical GAA are systematically evaluated and analysed. The SCE (Short Channel Effects) can sensibly be controlled and improved by proper adjustment of the metal gate work-function. In the present study, all the device performances are investigated through ATLAS device simulator from Silvaco.

Keywords

CGAA, DIBL, SCE, SOI, MOSFET

How to Cite this Article?

Sachdeva, T, K., Aggarwal, S. K., and Kushwaha, A. K. (2017). Investigate Sub-Threshold Performance Measures of Cylindrical Gate All Around MOSFET at Sub-Nanometer Regime. i-manager's Journal on Embedded Systems, 6(1), 1-5. https://doi.org/10.26634/jes.6.1.13889

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