i-manager Publications

Analysis and Comparison of Harmonic Reduction in Multilevel Inverters

G. Mahesh Manivanna Kumar*, Rama Reddy**

* Research Scholar, Sathyabama University, Tamil Nadu, India.

** Professor, Jerusalem College of Engineering, Tamil Nadu, India.

Periodicity:July - September'2010
DOI : https://doi.org/10.26634/jee.4.1.1255

Abstract

This paper presents a multilevel inverter with harmonics reduction along with the reduction in number of switches. The reduction in harmonic content in the three-level neutral-point-clamped (NPC), capacitor clamped inverter with inductive load is obtained by simulation. Similarly the reduction in harmonic content in the cascaded multilevel inverter is obtained. The percentage (%) THD is calculated for various levels (3, 7 and 9 level). Finally the percentage (%) THD obtained from various levels is compared. The functionality verification of the multilevel inverter circuit is done using PSPICE and MATLAB. The harmonic reduction is achieved by selecting appropriate switching angles.

Keywords

Neutral Point Clamped Inverter, Cascaded Multi Level Inverter

How to Cite this Article?

G. Mahesh Manivanna Kumar, and S. Rama Reddy (2010). Analysis and Comparison of Harmonic Reduction In Multilevel Inverters. i-manager’s Journal on Electrical Engineering, 4(1), 51-57. https://doi.org/10.26634/jee.4.1.1255

References

[1]. John N. Chiasson, Leon M. Tolbert, Keith J. McKenzie, Zhong Du,(2004). “ A Complete solution to the harmonic elimination problem”, IEEE transactions on power electronics, Vol. 19, No.2, pp. 491-498, March.

[2]. Jose Rodriguez, Jin-Sheng Lai and Fang Zheng, (2002). “Multilevel Inverters: A survey of topologies, Control applications,” IEEE transactions on Industrial Electronics, Vol.49, No. 4, pp. 724-738, August.

[3]. V. G. Agelidis and M. Calais (1998). “Application specific harmonic performance evaluation of multicarrier PWM techniques,” In Proc. IEEE PESC '98, Vol. 1, pp. 172 – 178.

[4]. A. Nabae, I. Takahashi, and H. Akagi (1981). “ A new neutral-point-clamped PWM inverter, “ IEEE Trans. Ind. Applicat., Vol. IA – 17, pp. 518 – 523, Sept./Oct.

[5]. P. D. Ziogas (1980). “Optimum voltage and harmonic control PWM techniques for three-phase static UPS inverters,” IEEE Trans. Ind. Applicat., Vol. IA-16. No. 4, pp. 542-546, July/Aug.

[6]. H. Patel and R. G. Hoft (1974). “ Generalized techniques of harmonic elimination and voltage control in thyristors: Part – I Harmonics elimination,” IEEE Trans. Ind. Applicat., Vol. IA-9, No. 3, pp. 310-317, May/June.

[7]. E. Babaei, S. H. Hosseini, G. B. Gharehpetian, M. T. Haque, and M. Sabahi (2007). “Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology,” Elsevier J. Electr. Power Syst. Res., Vol. 77, No. 8, pp. 1073–1085, Jun.

[8]. M. Manjrekar, P. K. Steimer, and T. Lipo (2000). “Hybrid multilevel power conversion system: A competitive solution for high-power applications,” IEEE Trans. Ind. Appl., Vol. 36, No. 3, pp. 834–841, May/Jun.

[9]. Z. Du, L. M. Tolbert, J. N. Chiasson, and B. Ozpineci (2006). “A cascade multi-level inverter using a single dc power source,” in Proc. IEEE APEC, pp. 426–430.

If you have access to this article please login to view the article or kindly login to purchase the article

Single Article

	North Americas,UK, Middle East,Europe		India	Rest of world
	USD	EUR	INR	USD-ROW
Online	15	15

ADD TO CART

Options for accessing this content:

If you would like institutional access to this content, please recommend the title to your librarian.
If you already have i-manager's user account: Login above and proceed to purchase the article.
New Users: Please register, then proceed to purchase the article.