References
[1]. Actel Corporation, SmartFusion Intelligent Mixed-
Signal FPGAs: Innovative Intelligent Integration, 2010;
www.actel.com/FPGA/SmartFusion.
[2]. I.Voyiatzis, A. Paschalis, D.Gizopoulos,N.Kranitis, and
C.Halatsis (2005). “A Concurrent BIST Architecture Based
on a Self-Testing RAM”, IEEE Transactions on Reliability,
Vol.54, No.1, pp. 69-78.
[3]. C. Stroude, J. Morton, T. Islam and H. Alassaly (2003).
“A mixed-signal built-in self-test approach for analog
circuits”, Southwest Symposium on Mixed-Signal Design,
Las Vegas, USA, pp, 196-201.
[4]. R. Frohwerk (1977). “Signature Analysis: A New Digital
Field Service Method”,Hewlett Packard J., Vol. 28, No 9,
May, pp. 2-8.
[5]. G. Starr, J. Qin, B. Dutton, C. Stroud, F. Dai and V.
Nelson (2009). “Automated generation of built-in self-test
and measurement circuitry for mixed-signal circuits and
systems,” Proc. IEEE Int. Symp. on Defect and Fault
Tolerance in VLSI Systems, pp. 11-19.
[6]. R. Sharma and K. Saluja (1993). “Theory, analysis and
implementation of an on-line BIST technique,” VLSI Design, Vol. 1, No 1, pp. 9-22.
[7] I. Voyiatzis, A. Paschalis, D. Gizopoulos, C. Halatsis, F.
Makri, and M. Hatzimihail (2008). “An input vector
monitoring concurrent BIST architecture based on a
precomputed test set,” IEEE Trans. Computers, Vol. 57, No.
8, pp. 1012-1022.
[8]. I. Voyiatzis, D. Gizopoulos, and A. Paschalis (2009).
“An input vector monitoring concurrent BIST scheme
exploiting “X” values,” 15th IEEE Int. On-Line Testing
Symposium, pp. 206-207.
[9]. Y.-S. Wang, J.-X.Wang, F.-C.Lai and Y.-Z. Ye (2005). “A
low-cost BIST scheme for ADC testing”, Shanghai, China, VI
Int. Conf. on ASIC, Vol. 2, pp. 665-668.
[10]. D. Lee, K. Yoo, K. Kim, G. Han and S. Kang (2004).
“Code-width testing-based compact ADC BIST circuit”,
IEEE Trans. on Circuits and Systems-II: Express briefs, Vol.
51, No 11, pp. 603-606.
[11]. G. Wu, J. Rao, A. Ren and M. Ling (2003).
“Implementation of a BIST scheme for ADC test”, V Int.
Conf. on ASIC, Beijing, China, Vol. 2, pp. 1128-1131.
[12]. A. Gookin (1977). “A fast reading high resolution
voltmeter that calibrates itself automatically”, Hewlett
Packard J., Vol. 28, No 6, pp. 2-10.
[13]. V. Kneller (2003). “Measurement, control and other
processes : to the problem of knowledge
systematization”,Cavtat-Dubrovnik, Croatia, XVII IMEKO
World Congress, pp. 1119-1124.
[14]. G. D'Antona and A. Ferrero (2006). Digital Signal
Processing for Measurement Systems, Springer Science
Business Media Inc., Berlin.
[15]. J. Wakerly (1978). Error Detecting Codes, Self-
Checking Circuits and Applications, Elsevier North-
Holland, New York.