Performance Analysis of Modified Source Junctionless Fully Depleted Silicon-on-Insulator MOSFET

Manvendra Chauhan*, Rajeev Kumar Chauhan**

Abstract

In this paper, the authors have presented a junctionless Fully Depleted Silicon on Insulator (FDSOI) MOSFET with a source engineering on an intrinsic silicon body with the purpose to improve I /I ratio of a transistor at the low thermal budget ON OFF process. The proposed device consists of very small region of high doping over dopingless region of the source. The charge plasma concept is also employed to introduce charge plasma on the source and drain region by using metal electrodes of appropriate work function. In this way, dopingless region of the source and drain get electrostatically induced whereas charge carrier density rises in an already doped region of source. This makes the proposed device to combine the benefits of modified source fully depleted silicon-on-insulator MOSFET (MS FDSOI MOSFET) (i.e., high I ON current and I /I ratio) and conventional junctionless transistors plus the transistors with intrinsic S/D regions (i.e., low ON OFF thermal budget process). The electrical properties of proposed device are simulated and compared with that of conventional MS FDSOI MOSFET.

Keywords

Junctionless, Source Engineering, Dopingless, Charge Plasma, Work Function, Electron Plasma.

How to Cite this Article?

Chauhan. M. S and Chauhan. R. K (2018). Performance Analysis of Modified Source Junctionless Fully Depleted Silicon-on-Insulator MOSFET. i-manager's Journal on Electronics Engineering, 8(2), 44-50.

References

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