In this paper, an efficient Dual power supply Static Random Access Memory (SRAM) is designed which reduces power consumption in Active and Standby mode. To achieve this, different circuit techniques is introduced to minimize both power modes particularly at room temperature. If the circuit operates in Active mode, a Bit Line (BL) power calculator is used uniformly to set the supply voltages between the cells or nets. In the stand-by mode, a digitally controllable retention circuit is used to regulate the supply voltages with small control power. Efficient circuit techniques of SRAM reveal the power reduction of 27% in Active mode and 85% in Stand-by mode. The design is carried out in Code Composer Studio (CCS) as the software environment and MSP430G2553 is the target Hardware device. When compared with the conventional schemes, the proposed design reduces power consumption at a greater extent.