Concurrent Testing of Analog-to-Digital Converters

Vadim Geurkov*, **, Lev Kirischian***
*-***-**** Associate Professor, Department of Electrical and Computer Engineering, Ryerson University, Toronto, Canada.
** Firmware Developer, R&D Department, MDA Robotics Inc, Toronto, Canada.
Periodicity:September - November'2010
DOI : https://doi.org/10.26634/jele.1.1.1193

Abstract

Compaction testing methods allow at-speeddetecting of errors while possessinga low cost of implementation.Owing to this distinctive feature, compaction methods have been widely used for built-in testing, as well asexternal testing. In the latter case, the bandwidth requirements tothe automated test equipment employed are relaxedwhich reduces the overall cost of testing.Concurrent compaction testing methods use operational signals to detect misbehavior of the device under test and do not require input test stimuli. These methods have been employed for digital systems only. In the present work, we extend the use of compaction methods for concurrent testing of analog-to-digital converters. We estimate tolerance bounds for the result of compaction and evaluate the aliasing rate.

Keywords

Analog-to-digital converter, Built-in self-test, Signature analysis.

How to Cite this Article?

V. Geurkov et.al (2010). Concurrent Testing Of Analog-To-Digital Converters. i-manager’s Journal on Electronics Engineering, 1(1), 8-14. https://doi.org/10.26634/jele.1.1.1193

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