JEE_V2_N4_RP2 V. Kumar Chinnaiyan Jovitha Jerome J. Karpagam Journal on Electrical Engineering 2230 – 7176 2 4 8 15 cascaded multilevel inverter, THD, Sine pulse Width Modulation, space vector pulse width modulation A Space Vector Pulse Width Modulation (SVPWM) scheme for cascaded multilevel inverters is proposed in this paper. The proposed PWM scheme generates the inverter leg switching times, from the sampled reference phase voltage amplitudes and centres the switching times for the middle vectors, in a sampling interval, as in the case of conventional space vector PWM (SVPWM). The SVPWM scheme, presented for diode clamped multilevel inverters, can also work in the overmodulation range, using only the sampled amplitudes of reference phase voltages. The present PWM technique does not involve any sector identification and considerably reduces the computation time when compared to the conventional space vector PWM technique. The present PWM signal generation scheme can be used for any multilevel inverter configuration. April - June 2009 Copyright © 2009 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=216