An inverter is Three-phase voltage source inverters are widely used in variable speed ac motor drives applications since they provide variable voltage and variable frequency output through pulse width modulation control. Continuous improvement in terms of cost and high switching frequency of power semiconductor devices and development of machine control algorithm leads to growing interest in more precise PWM techniques. Volume of work has been carried out in this direction and a review of popular techniques are presented in [1,2]. The most widely used PWM method is the carrier-based sine-triangle PWM method due to simple implementation in both analog and digital realization. However, the dc bus utilization in this method is low. This has led to the investigation into other techniques with an objective of improvement in the dc bus utilization.

It is found in [3] that injection of zero sequence (third harmonic) extends the range of operation of modulator by 15.5%. The major problem associated with high power drive applications is high switching losses in inverters. To reduce switching losses a PWM technique termed as discontinuous PWM (DPWM) was developed in[4,5]. The proposed discontinuous PWM techniques were based on triangle-intersection-implementation, in which non sinusoidal modulating signal is compared with triangular carrier wave. A generalized discontinuous PWM algorithm was presented in [6] which encompasses the techniques presented in[4,5]. However, the better visualization of the DPWM methods is obtained by using space vector theory. A generalized DPWM based on space vector theory is available in [7-10]. This paper is focused on the space vector theory approach. All the discontinuous PWM strategies is based on the principle of eliminating one of the zero voltage vectors, causing the active voltage space vectors to join together in two successive half switching interval. The discontinuous PWM techniques have the advantage of eliminating one switching transition in each half switching period, consequently reducing the number of switching by one third. Alternatively, the switching frequency can be increased by 3/2 for the same inverter losses.

Another PWM technique termed as Space vector PWM based on space vector theory was proposed in [11] which offer superior performance to the carrier-based sinetriangle PWM technique in terms of higher dc bus utilization and better harmonic performance. Later on it was realized that the placement of the active and zero space vectors in each half switching period is the only difference between the carrier-based scheme and SVPWM [12].

This paper is devoted to the development of Space vector PWM strategies in discontinuous mode for three-phase VSIs. At first space vector PWM in linear region is analyzed and a review of the existing DPWM techniques based on space vector approach is presented. Based on the existing techniques three more discontinuous space vector PWM methods are proposed by rearranging the two zero vectors skillfully. A complete analysis and comparison of the existing and the proposed techniques are presented. The performance indices chosen are the harmonic distortion factor, total harmonic distortion and weighted total harmonic distortion.

This section is devoted to the development of Space vector PWM for a two-level voltage source inverter in linear region of operation [7]. As seen from Figure 1, there are six switching devices and only three of them are independent as the operation of two power switches of the same leg are complimentary. The combination of these three switching states gives out eight possible space voltage vectors. The space vectors forms a hexagon with 6 distinct sectors, each spanning 60 degrees in space. At any instant of time, the inverter can produce only one space vector. In space vector PWM a set of three vectors (two active and a zero) can be selected to synthesize the desired voltage in each switching period. All of the eight modes are shown in Table1.

Figure 1. Power circuit of a three-phase voltage source inverter

Figure 2. The switches position during eight topologies

Table1. Possible modes of operation of a three-phase VSI

Out of eight topologies six (states 1-6) produce a nonzero output voltage and are known as active voltage vectors and the remaining two topologies (states 0 and 7) produce zero output voltage (when the motor is shorted through the upper or lower transistors) and are known as zero voltage vectors, various possible switching states are shown in Figure 2.

[Space vector is defined as[7],

(1)

Where

The space vector is a simultaneous representation of all the three-phase quantities. It is a complex variable and is function of time in contrast to the phasors. Phase-to- neutral voltages of a star-connected load are most easily found by defining a voltage difference between the star point n of the load and the negative rail of the dc bus N. The following correlation then holds true:

(2)

Since the phase voltages in a start connected load sum to zero, summation of equation (2) yields

(3)

Substitution of (3) into (2) yields phase-to-neutral voltages of the load in the following form:

(4)

Phase voltages are summarized and their corresponding space vectors are listed in Table 1. The eight vectors including the zero voltage vectors can be expressed geometrically as shown in Figure 3.

Figure 3. Space Vector representation of Line to Neutral Voltages

Each of the space vectors, in the diagram represent the six voltage steps developed by the inverter with the zero voltages V₀(0 0 0) and V₇(1 1 1 ) located at the origin.

Space Vector PWM requires the averaging of the adjacent vectors in each sector. Two adjacent vectors and zero vectors are used to synthesize the input reference determined from Figure 4 for sector I. Using the appropriate PWM signals a vector is produced that transitions smoothly between sectors and thus provide sinusoidal line to line voltages to the motor. The switching patterns for switches in different sectors are as shown in Figure 5.

Figure 4. Principle of time calculation for SVPWM in sector I

Figure 5. Switching Patterns for Switches in Different Sectors

In order to generate the PWM signals that produces the rotating vector, the PWM time intervals for each sector is determined from Figure 4 for sector I as

Along real axis:

(5)

Along imaginary axis:

(6)

Solving equations (5) and (6)

(7)

(8)

(9)

Generalizing the time expressions gives

(10)

(11)

The periods T₁, T₂ and T₀ depends only on the reference vector amplitude V_s^* and the angle ''. It is to be noted that the period are the same in all sectors for the same V_s^* and '' position. In the under modulation region, the vector V_s^* always remains within the hexagon. The mode ends in the upper limit when V_s^* describes the inscribed circle of the hexagon.

Modulation Index MI (m) is given by

Where, V_s^* = input reference vector magnitude

V_1SixStep = fundamental peak value of the six step output

The maximum value of input reference is the radius of largest circle inscribed in the hexagon given by,

Therefore, maximum modulation index

(12)

This means that 90.7% of the fundamental of the six step wave is available in the linear region, compared to 78.55% in the sinusoidal PWM[7].

It is possible to move the position of the active voltage pulses around within the half switches interval, to eliminate one zero output voltage pulse. Modulation strategies using this concept are termed discontinuous modulation, and a number of possible alternatives for three phase inverter system have been reported over the years. [7,8,9]. However, all the schemes essentially just rearrange the placement of the zero output voltage pulse within each half carrier or carrier interval. A detailed review is presented in the subsequent section.

2.1 Existing discontinuous modulation strategies:

It can be seen from the literature review [14], that there exist six different types of discontinuous PWM methods.

1. T₀ = 0 (DPWMMAX) for all sectors [15]
2. T₇ = 0 (DPWMMIN) for all sectors [15]
3. 0⁰ Discontinuous modulation (DPWM 0) [8]
4. 30⁰ Discontinuous modulation ( DPWM 1) [4]
5. 60⁰ Discontinuous modulation ( DPWM 2 ) [8]
6. 90⁰ Discontinuous modulation ( DPWM 3) [8]

All the existing schemes are shown in Figure 6. Part (a) of Figure 6 show the placement of zero vectors and part (b) of Figure 6 show the waveforms for each schemes where V_avg(Leg voltage), V_a(phase voltage), V_nN(voltage between neutral point) called common mode voltage.

Figure 6. Existing Discontinuous PWM schemes and associated voltage waveforms

2.2 Proposed Discontinuous PWM Strategies:

Based on the previously discussed methods of DPWM, three novel schemes are suggested. These are extension of the existing methods. The first scheme termed as DPWM4 divides the complete space vector plane in four quadrants. The zero time T₀(0 0 0) is kept zero in the first and third quadrant. The zero time T₇(1 1 1) is kept zero in the second and fourth quadrant. The resulting waveform of phase leg voltages and common mode voltages are shown in Figure 7 (b). Figure 7(a) illustrates the placement of zero vectors.

The second proposed scheme keeps T₀(0 0 0) zero in first three sectors and T₇(1 1 1) is remained zero for the next three sectors. The resulting waveforms are shown in Figure 7 (c) and 7(d). This scheme is termed as DPWM5.

In the third proposed scheme, termed as DPWM6, the complete space vector is divided into eight sectors each spanning 45⁰ .The zero vector T₀(0 0 0) is kept zero in the first sector [ 0⁰ - 45⁰] and T₇(1 1 1) is kept zero in the next sector [ 45⁰ - 90⁰] and the pattern repeats in the subsequent sectors. The resulting waveforms are Figure 7(e) & 7 (f).

Figure 7. Proposed discontinuous schemes and associated wave forms

This section investigates the performance of different PWM strategies. At first average leg voltage for each sector is determined followed by the harmonic performance evaluation. Only first existing scheme namely DPWMMIN is considered for showing the sample calculation. To determine the average leg voltage consider Figure 8 which shows the leg voltage waveform in sector I for one switching period. The positive and negative dc rail is assumed as ±Vdc.

The three-phase average leg voltages can now be expressed as,

(13)

(14)

(15)

However, since

(16)

The equations becomes

(17)

(18)

(19)

From Table 2 substituting the values of T₁ & T₂ , the three- phase leg voltages becomes,

(20)

(21)

(22)

Figure 8. Pulse pattern for the DPWMMIN in the first sextant, 0 < θ < π/ 3

The resulting expressions for average leg voltage for all six sectors for DPWMMIN are tabulated in Table 3.

Table 3. Average Leg voltages for t₇ = 0 DPWMMIN

Following the same principle, average leg voltages for other schemes are evaluated and the resulting expressions are tabulating in Table 4-11.

Table 4. Average Leg voltages for DPWMMAX

Table 5. Average Leg voltages for DPWM0

Table 6. Average Leg voltages for DPWM1

Table 7. Average Leg voltages for DPWM2

Table 8. Average Leg voltages for DPWM3

Table 9. Average Leg voltages for DPWM4

Table 10. Average Leg voltages for DPWM5

Table 11. Average Leg voltages for DPWM6

The overall harmonic losses for a particular modulation scheme can then be calculated by integrating the equation over a positive half fundamental cycle. For all modulation schemes, the phase leg reference voltages are the continuous function, and the integration can be done over one set of limits. For space vector modulation, the phase leg waveforms are separate sinusoidal segments in each 60⁰ sextants, for DPWMMIN as listed in Table 3.

Using the result given in[7],

(23)

This is the generalized form of the ripple current equation,

where and and

the L₁ , L₂ and L_m correspond to stator leakage, rotor leakage, and the magnetizing inductances respectively assuming an induction motor load. The harmonic losses can then be determined by integrating equation over a positive half fundamental cycle (the above development is valid for > 0), with appropriate substitution for u₁ and u₂ for each modulation strategy to be evaluated, to determine the squared harmonic current ripple.

Substituting the values of u_{1 &} u₂ into equation (23) from the table for DSVPWMs, then creates separate expression for the squared harmonic ripple current over the positive fundamental cycle, gives the result that are [7]

T₀ = 0, t₇ = 0, DPWM0 and DPWM2

(24)

DPWM 1

(25)

DPWM 3

(26)

DPWM 4

(27)

DPWM 5

(28)

DPWM 6

(29)

Or in more general terms as

(30)

Where the function f(m) is the Harmonic distortion factor (HDF). HDF is commonly used as a figure of merit for PWM strategies that are independent of switching frequency, DC bus voltage, and load inductances. It only depends on the modulation index [6]. The HDF for existing schemes are evaluated and are shown in Figure 9.

Among the existing scheme the superior performance of DPWM3 is seen from Figure 9 for high modulation index. The zero vector i.e. T₀ and T₇ can be kept zero only up to one sector, more than one sector may cause increase in switching losses as can be seen in DPWM5, in which the zero vector T₀ = 0 for first three sectors. The analysis of ripple current and plot with modulation index, results the ripples in output current increased.

Figure 9. Harmonic distortion factor (HDF) for different PWM strategies as a function of modulation index (m), for pure inductive load

Two more performance indices for comparison purpose are considered namely Total Harmonic Distortion (THD) and Weighted Total Harmonic Distortion (WTHD) in this paper. The method of comparing the effectiveness of modulation is by comparing the unwanted components i.e. the distortion in the output voltage or current waveform, relative to that of an ideal sine wave, it can be assumed that by proper control, the positive and negative portions of the output are symmetrical (no DC or even harmonics). The total harmonics distortion factor reduces to [7],

(31)

Normalizing this expression with respect to the quantity (V ) i.e. fundamental, the weighted total harmonic distortion (WTHD) becomes defined as [7]

(32)

The simulation is carried out to obtain THD and WTHD for different modulation index. The obtain results are given in Table 12(a) for the existing schemes and Table 12(b) for the proposed schemes. In simulation the switching period is taken as 0.2ms, and the inverter output frequency is considered as 50 Hz.

The graphical representation of THD and WTHD is shown in Figure10 for a quick comparison. Further, two more figures are generated at lowest and highest modulation index given as Figure11 and Figure 12.

At first the existing schemes are compared and it can be seen that THD and WTHD of the scheme t ₇=0 is best than all other schemes, the schemes DPWM2 and DPWM3 give similar performances and the scheme DPWM0 is worst. In the proposed schemes DPWM4 is best and DPWM6 is worst.

Table 12(a). THD and WTHD of the existing schemes

Table 12(b). THD and WTHD of the proposed schemes

Figure10. Total harmonic distortion (THD) for different modulation strategies as a function of modulation index

Figure 11. Comparison of THD & WTHD of different DSVPWM

Figure 12. Comparison of THD & WTHD of different DSVPWM Schemes (at modulation index = 0.907)

In DSVPWM, using only one certain zero vector in the whole fundamental period will lead to the unbalance of switching frequency in the upper and lower arm, which would shorten the operation life of the inverter. However, two zero vectors are used in turns would not cause this problem. Furthermore, the THD decreases as the modulation increases, this indicates that DSVPWM is more suitable to operate under high modulation index. The effect of various types of loads on the performance of modulation is investigated. The load considered is at unity p.f., 30 deg. lagging, 60 deg. lagging and finally at 90 deg. lagging. The resulting THDs and WTHDs are listed in Tables 13-16 and cor responding graphical representations are given in Figures 13-16. The load transfer function is,

where L and R are the inductance and resistance of the load, respectively.

Table 13(a) - THD and WTHD of the existing schemes at unity power factor

Table 13(b) - THD and WTHD of the proposed schemes at unity power factor

Figure13. Total harmonic distortion (in inverter phase 'a' voltage) for different modulation strategies as a function of modulation index (m)

Table 14(a). THD and WTHD of the existing schemes at 30 deg. Lagging power factor

Table 14(b). THD and WTHD of the proposed schemes at 30 deg. Lagging power factor

Figure14. Total harmonic distortion (in inverter phase 'a' voltage) or different modulation strategies as a function of modulation index (m)

Table 15(a). THD and WTHD of the existing schemes at 60 deg. Lagging power factor

Table 15(b).- THD and WTHD of the proposed schemes at 60 deg. Lagging power factor

Figure15. Total harmonic distortion (in inverter phase 'a' voltage) for different modulation strategies as a function of modulation index (m)

Table 16(a). THD and WTHD of the existing schemes at 90 deg. Lagging power factor

Table 16(b). THD and WTHD of the proposed schemes at 90 deg. Lagging power factor

Figure16. Total harmonic distortion (in inverter phase 'a' voltage) for different modulation strategies as a function of modulation index (m)

Discontinuous space vector PWM for three-phase voltage source inverter is analyzed in this paper. The switching losses of DSVPWM are less than continuous space vector PWM, and if the parameter of load matches the PWM pattern, the switching loss will reduce further. There are six different DPWM schemes available in the literature. A comprehensive analysis of these existing DPWM is done and reported in the paper. Analytical and simulation results are incorporated. Three novel schemes are suggested by placing the zero vectors differently. Simulation studies are done to evaluate the performance of the proposed methods. For pure inductive load the best existing scheme is seen as DPWMMIN and worst is DPWM1. Among the proposed schemes DPWM4 is providing lower THD and WTHD. However the proposed scheme DPWM4 is better than existing schemes DPWMMAX, DPWM0, DPWM2 and DPWM3. The performance of modulators for different loading conditions can be also done.