JWCN_V4_N3_RevP1 E. Sujatha C. Subhas M.N. Giri Prasad N. Padmaja Journal On Wireless Communication Networks 2320 - 2351 4 3 33 39 802.11n, Fast Fourier Transform (FFT), Inverse Fast Fourier Transform (IFFT), Multiple-Input Multiple-Output (MIMO), Orthogonal Frequency DivisionMultiplexing (OFDM) This paper surveys, the widely adopted architectures of FFT/IFFT processor for MIMO OFDM systems. Emerging trends in mobile communication pose many architectural challenges to achieve high data throughput, less hardware complexity, low power consumption, high speed MIMO-OFDM systems. FFT/IFFT processor is one of the highest computational complexity modules in the system, to meet IEEE 802.11n requirements. The main concern of application of pipeline FFT/IFFT architectures is performance and power reduction. At the same time, application of memory based FFT/IFFT architectures are preferred when complexity is a main concern. High throughput rate can be achieved by the use of parallel data path schemes and higher radix and mixed radix FFT algorithms are used to reduce power consumptions and hardware complexity of the OFDM system. The unfolding mixed radix multipath delay feedback FFT architecture is used to deal efficiently with multiple data sequences. In Single-path delay feedback style, a reconfigurable complex multiplier and bit-parallel multipliers to achieve a ROM-less FFT/IFFT processor for low power consumption. This paper presents a comparative study on different efficient pipeline FFT/IFFT processor for OFDM applications in terms of scope of optimization and hardware complexity. Finally, this survey paper suggests open research challenges in this emerging area. October - December 2015 Copyright © 2015 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=4849