RF Phase Error Built-in-self-test for A GSM SoC

JEE_V1_N4_RP5 RF Phase Error Built-in-self-test for A GSM SoC D. Webster L. Phan O. Eliezer R. Hudgens D.Y.C. Lie Journal on Electrical Engineering 2230 – 7176 1 4 39 44 All digital phase locked loop (ADPLL), Built-in self test (BiST), Digitally controlled oscillator (DCO), Global system for mobile communications (GSM), Phase Error (PHE), Phase trajectory error (PTE), System-on-Chip (SoC) This paper presents a novel RF Built-in-Self-Test (RF-BiST) targeting to replace the traditionally expensive and time-consuming RF parametric phase error test on a GSM Digital Radio Processor (DRP) radio transceiver. The verification of the RF BiST in a production environment and a comparison of the internal BiST with two alternative external tests is presented, validating the RF BiST as an acceptable test method for determining the phase error of GSM devices. The results illustrate that there are great opportunities in reduction of test time and costs by moving to the internal digital method of the presented BiST for testing RF/analog IC products. April - June 2008 Copyright © 2008 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=378