JES_V4_N1_RP2 Jean Perier Wissem Chouchene Jean-Luc Dekeyser Journal on Embedded Systems 2278 - 7895 4 1 14 23 FPGA, Partial Dynamic Reconfiguration, Circuit Merging, Softcore One goal of reconfiguration is to save power and the occupied resources. In this paper, we compare two different kinds of reconfiguration available on Field-Programmable Gate Arrays (FPGA) and authors discuss their pros and cons. The first method that we study is circuit merging. This type of reconfiguration methods consists of sharing common resources between different circuits. The second method that we explore is Dynamic Partial Reconfiguration (DPR). It is specific to some FPGA, allowing well defined reconfigurable parts to be modified during run-time. Authors show that DPR, when available, has good and more predictable result in terms of occupied area. There is still a huge overhead in terms of time and power consumption during the reconfiguration phase. Therefore, authors show that circuit merging remains an interesting solution on FPGA because it is not vendor specific and the reconfiguration time is around a clock cycle. Besides, good merging algorithms exist even-though FPGA physical synthesis flow makes it hard to predict the real performance of the merged circuit during the optimization. We establish the comparison in the context of the HoMade processor. February - April 2015 Copyright © 2015 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=3691