JES_V3_N1_RP2 Bharathi Muni Neelima Koppala Journal on Embedded Systems 2278 - 7895 3 1 19 25 Reversible Multiplier, Disjoint Sum of Products (DSOP), Exorlink, Quantum Cost The multiplier in any arithmetic unit dissipates a significant amount of energy as large number of computations are required if the number of bits in the design increase. Thus, if efficient reversible logic is used, then the power consumption can be reduced drastically as the information bits are not lost in case of reversible computation. This Paper focuses on the design of two-bit multiplier using a synthesis approach called Exorlink which reduces quantum cost compared to the technique Disjoint Sum of Products (DSOP). The design is coded in VHDL, simulated using ISIM and synthesized using Xilinx ISE 10.1i for the device Spartan3E FPGA. February - April 2014 Copyright © 2014 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=2950