65nm CMOS LVDS I/O Transmitter Implementation with 600Mbps Data Rate

JES_V1_N3_A1 65nm CMOS LVDS I/O Transmitter Implementation with 600Mbps Data Rate Alexey Balashov Andrey Malkov Journal on Embedded Systems 2278 - 7895 1 3 1 6 LVDS, Driver, High-Speed, Analog IC, I/O Design Low Voltage Differential Signaling (LVDS) technology is an effective solution for the physical layer of high-speed data applications. The advantages of the LVDS interface include high data rates, low noise generation, and low power consumption across the entire speed range. Different approaches of LVDS circuit implementation are considered in this article. The LVDS transmitter circuit implementation in the I/O pad cell for microprocessor product based on 65nm CMOS bulk technology is presented. The designed LVDS transmitter supports a 600 Mbps data transfer rate and supply current no more than 5mA. August - October 2012 Copyright © 2012 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/ArticleHTML.aspx?articleID=1989