JELE_V6_N4_RP2 B. Venkata Vinod Kumar SK. Mahaboob Basha Journal on Electronics Engineering 2249 – 0760 6 4 7 12 Floating-Point Format, Inexact Circuit, Normalization and Rounding To represent very large or small numbers, a wide range of fixed point representation is required, which is no longer effective. These numbers can be represented based on the IEEE-754 standard. This paper presents the designing of an inexact floating-point adder/subtractor which can perform addition, and subtraction operations. These operations are performed based on the single-precision floating-point format that uses IEEE754-2008 standard. An inexact circuit offers an approach that reduces both static and dynamic power for error tolerant applications. The normalization and rounding operations are the related operations, which are dealt with in terms of inexact computing. The main objective of this design is to decrease the area and increase the speed. The results of this inexact floating-point unit are below 30% error deviation, which is acceptable. The inexact floating point Adder/subtractor is modeled in VHDL and the simulation results are obtained from Xilinx ISE 14.5. June – August 2016 Copyright © 2016 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=8087