JELE_V5_N4_RP2 Leonardo Suriano Roberto Marani Anna Gina Perri Journal on Electronics Engineering 2249 – 0760 5 4 19 23 High Electro Mobility Transistor (HEMT), Thermal Effects, Modeling, DC I-V Characteristics This paper presents a light DC thermal model of recessed gate P-HEMT devices, based on the Chaibi model, where the authors have identified the transistor parameters having greater influence on the device behaviour for temperature variations. The main aims are to improve the accuracy of modelled I-V curves, in particular in the knee and saturation regions and above all to give the device source-drain current as a function of external voltages, as seen at the device gates, by-passing the very difficult measurement of parasitic resistances for the I-V characterisation. To verify the accuracy of the proposed model, the results are compared with those of Chaibi model, obtaining a negligible relative error, with however a compilation time and a run time much more low. June – August 2015 Copyright © 2015 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=3541