JELE_V5_N3_RP3 D. Ajitha K. Venkata Ramanaiah V. Sumalatha Journal on Electronics Engineering 2249 – 0760 5 3 22 29 Quantum Cellular Automata, Majority gate, XOR gate, Adder circuits, Parity Generator, Parity Checker As a substitute for CMOS, innovation of quantum cellular automata was anticipated by Lent et al, to represent exemplary cell automata with quantum dots. Quantum Cellular Automata (QCA) may be a progressive innovation that endeavors the certain nano level issues to perform computing. Its potential advantages are high speed, high device density, and low power dissipation. This paper presents the design of XOR gate with the least number of cells; furthermore the circuit appearance is simple. Exploitation of this novel XOR gate leads to the development of combinational circuits like Half Adder, Full Adder, Parity Generator and Parity Checker etc., which were developed effectively in a single layer structure with less number of cells, area and delay, as compared to the earlier designs. This paper mainly focusses on the construction of optimized combinational circuits without using cross-overs in QCA. Further, the simulation results are presented. March – May 2015 Copyright © 2015 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=3394