JELE_V3_N4_RP1 Ravi T. Kannan V. Journal on Electronics Engineering 2249 – 0760 3 4 4 12 EMI, EMC, Anechoic chamber, EMI immunity, EMI susceptibility, Emission test, Immunity test In this paper, a highly durable Double Edge Triggered D-Flip Flop based Serial in Serial Out (SISO), Serial in Parallel Out (SIPO), Parallel In Serial Out (PISO) and Parallel In Parallel Out (PIPO) shift registers are designed using 10nM Carbon Nano Tube Field Effect Transistor (CNTFET) technology. The CNTFET is a cutting edge device to overcome the current CMOS technology for its excellent electrical properties. To evaluate the durability, shift registers using CNTFET are analysed and the transient analysis are depicted. Power consumption, delay, PDP, rise time and fall time are evaluated using HSPICE with 1GHz operating frequency. June – August 2013 Copyright © 2013 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=2392