JELE_V1_N1_RP5
Reduction of Power Dissipation Using Gray Bus Encoder As Per Microelectronic standard
Kamal K. Mehta
R.N. Patel
M. Kowar
H.R. Sharma
Journal on Electronics Engineering
2249 – 0760
1
1
31
38
CMOS Transition Activity, Gray Bus Encoding, Low Power Micro Electronics, Dynamic Power Dissipation, VLSI
Modern computing system requires having feature of low power consumption. Attempt has been made in this direction and observed that we can attempt to reduce power consumption via adding logic circuit which in turn reduces delay in system. In such case the power requirement is mainly influenced by transition activity, which defines dynamic component of power consumption. Many encoding methods known as “Bus Encoding Technique” have been proposed to reduce transition activity. Based upon the features of bus encoding scheme, specific application has been proposed. Gray encoding scheme is credited as fundamental encoding scheme recommended for generalized application. Many factors were used to find out efficiency of any encoding method. Power requirement and delay are proven to be inversely proportional to each other. Recommendation of CODEC depends upon overhead results. This paper aims to target Gray Encoding scheme for calculating power. Work has been further extended to consider practical application in 0.25-micro meter manufacturing technology. Overhead has been calculated in terms of power consumed, against communication. It has resulted in 109.036603 milli watts of power dissipation.
September - November 2010
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