JDP_V1_N2_RP3 B. Hari Krishna Dr. S. Ravi Journal on Digital Signal Processing 2322–0368 1 2 19 23 NSCLB, CLB, FPGA, Xilinx This paper presents an analysis of the fault tolerance achieved by an autonomous evolvable system. By using this method the system may self recover from both transient and cumulative faults. In this paper we present a new technique NSCLB for reconfiguring FPGA circuits. An example of 24 CLBs is tested and results show that it may properly recover more number of faults. The faulty CLB is replaced both structurally and functionally. By selecting the nearest spare the routing path is decreased. The method is implemented using VHDL language in Xilinx10.1 version. April - June 2013 Copyright © 2013 i-manager publications. All rights reserved. i-manager Publications http://www.imanagerpublications.com/Article.aspx?ArticleId=2328