JCIR_V3_N4_RP4
A Survey on Brent-Kung, Han-Carlson and Kogge-Stone Parallel Prefix Adders for Their Area, Speed and Power Consumption</author>
<author>C. Ruth Vinutha</author>
<author>M. Bharathi</author>
<author>D. Divya</author>
<journal>Journal on Circuits And Systems</journal>
<issn>2322–035X</issn>
<volume>3</volume>
<issue>4</issue>
<first_page>37</first_page>
<last_page>41</last_page>
<keywords>Brent Kung (BK) Adder, Kogge Stone (KS) Adder, Han-Carlson (HC) Adder, Area, Speed, Power, Delay</keywords>
<abstract>The Parallel Prefix Adder (PPA) is one of the fastest type of adders that had been created and developed from carry look ahead adders. Three common types of parallel prefix adders are Brent-Kung, Han-Carlson and Kogge-Stone adders. This research involves an investigation of the performances of these three adders in terms of computational delay, Power, Speed and design area. The investigation and comparison for these adders was conducted for a 16 bit size. By using the Xilinx 14.5 design software, the designs for Brent Kung, Han-Carlson and Kogge Stone adders were developed. Comparison of area, delay, speed and area for 16 bit Kogge Stone, Han-Carlson and Brent Kung adders show that the Kogge Stone adder is best in terms of speed and the reduced area is obtained from the Han-Carlson adder. The results and simulation are verified using Xilinx 14.5 software.</abstract>
<date>September - November 2015</date>
<copyright>Copyright © 2015 i-manager publications. All rights reserved.</copyright>
<publisher>i-manager Publications</publisher>
<article_url>http://www.imanagerpublications.com/Article.aspx?ArticleId=5929</article_url>